-
1
-
-
4444289720
-
A dual-core 64b ultrasparc microprocessor for dense server applications
-
S. Malik, L. Fix, and A. B. Kahng, Eds. ACM
-
T. Takayanagi, J. L. Shin, B. Petrick, J. Su, and A. S. Leon, "A dual-core 64b ultrasparc microprocessor for dense server applications," in DAC, S. Malik, L. Fix, and A. B. Kahng, Eds. ACM, 2004, pp. 673-677.
-
(2004)
DAC
, pp. 673-677
-
-
Takayanagi, T.1
Shin, J.L.2
Petrick, B.3
Su, J.4
Leon, A.S.5
-
2
-
-
20344374162
-
Niagara: A 32-way multithreaded SPARC processor
-
P. Kongentira, K. Aingaran, and K. Olukotum, "Niagara: a 32-way multithreaded SPARC processor," IEEE Micro, vol. 25, no. 2, pp. 21-29, 2005.
-
(2005)
IEEE Micro
, vol.25
, Issue.2
, pp. 21-29
-
-
Kongentira, P.1
Aingaran, K.2
Olukotum, K.3
-
3
-
-
49949101741
-
MIPS MT: A multithreaded RISC architecture for embedded real-time processing
-
P. Stenström, M. Dubois, M. Katevenis, R. Gupta, and T. Ungerer, Eds. Springer
-
K. D. Kissell, "MIPS MT: A multithreaded RISC architecture for embedded real-time processing," in HiPEAC, ser. Lecture Notes in Computer Science, P. Stenström, M. Dubois, M. Katevenis, R. Gupta, and T. Ungerer, Eds., vol. 4917. Springer, 2008, pp. 9-21.
-
(2008)
HiPEAC, Ser. Lecture Notes in Computer Science
, vol.4917
, pp. 9-21
-
-
Kissell, K.D.1
-
6
-
-
2042458649
-
A survey of processors with explicit multithreading
-
T. Ungerer, B. Robič, and J. Šilc, "A survey of processors with explicit multithreading," ACM Comput. Surv., vol. 35, no. 1, pp. 29-63, 2003.
-
(2003)
ACM Comput. Surv.
, vol.35
, Issue.1
, pp. 29-63
-
-
Ungerer, T.1
Robič, B.2
Šilc, J.3
-
7
-
-
35048821019
-
Scalable instruction-level parallelism
-
Springer Berlin / Heidelberg
-
C. Jesshope, "Scalable instruction-level parallelism," in Computer Systems: Architectures, Modeling, and Simulation. Springer Berlin / Heidelberg, 2004, pp. 383-392.
-
(2004)
Computer Systems: Architectures, Modeling, and Simulation
, pp. 383-392
-
-
Jesshope, C.1
-
9
-
-
0025404493
-
Executing a program on the MIT tagged-token dataflow architecture
-
Arvind and R. S. Nikhil, "Executing a program on the MIT tagged-token dataflow architecture," IEEE Transaction on Computers, vol. 39, no. 6, pp. 300-318, 1990.
-
(1990)
IEEE Transaction on Computers
, vol.39
, Issue.6
, pp. 300-318
-
-
Arvind1
Nikhil, R.S.2
-
10
-
-
51949095281
-
-
RAMP retreat August update
-
Sun Microsystems. RAMP retreat August, 2008 update. http://www.opensparc. net/publications/presentations/ramp-retreat-august-2008-update.html.
-
(2008)
Sun Microsystems
-
-
-
11
-
-
50649103287
-
An architecture and protocol for the management of resources in ubiquitous and heterogeneous systems based on the svp model of concurrency
-
M. Berekovic, N. J. Dimopoulos, and S. Wong, Eds. Springer
-
C. R. Jesshope, J.-M. Philippe, and M. van Tol, "An architecture and protocol for the management of resources in ubiquitous and heterogeneous systems based on the svp model of concurrency," in SAMOS, ser. Lecture Notes in Computer Science, M. Berekovic, N. J. Dimopoulos, and S. Wong, Eds., vol. 5114. Springer, 2008, pp. 218-228.
-
(2008)
SAMOS, Ser. Lecture Notes in Computer Science
, vol.5114
, pp. 218-228
-
-
Jesshope, C.R.1
Philippe, J.-M.2
Van Tol, M.3
|