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Volumn , Issue , 2004, Pages 673-677
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A dual-core 64b UltraSPARC microprocessor for dense server applications
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Author keywords
Cache; Coupling noise; Deep submicron technology; Dense server; Dual core; L2; Leakage; Multiprocessor; NBTI; Negative Bias Temperature Instability; Throughput computing; UltraSPARC
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Indexed keywords
AMPLIFIERS (ELECTRONIC);
ATTENUATION;
BUFFER STORAGE;
INTEGRATED CIRCUIT LAYOUT;
MULTIPROCESSING SYSTEMS;
NANOTECHNOLOGY;
SPURIOUS SIGNAL NOISE;
STANDARDS;
COUPLING NOISE;
DENSE SERVER;
DUAL-CORE;
MULTIPROCESSORS;
NEGATIVE BIAS TEMPERATURE INSTABILITY;
THROUGHPUT COMPUTING;
ULTRASPARC;
MICROPROCESSOR CHIPS;
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EID: 4444289720
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/996566.996750 Document Type: Conference Paper |
Times cited : (4)
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References (10)
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