-
2
-
-
0031234685
-
Trace Processors: Moving to Fourth-Generation Microarchitectures
-
September
-
James E. Smith and Sriram Vajapeyam, "Trace Processors: Moving to Fourth-Generation Microarchitectures", pp. 68-74, IEEE Computer, Vol. 30, No. 9, September 1997
-
(1997)
IEEE Computer
, vol.30
, Issue.9
, pp. 68-74
-
-
Smith, J.E.1
Vajapeyam, S.2
-
3
-
-
36349030260
-
A Single-Chip Multiprocessor
-
December
-
L. Hammond, B.A. Nayfeh, and K. Olukotun, "A Single-Chip Multiprocessor", IEEE Computer, 29(12):84-89, December 1996
-
(1996)
IEEE Computer
, vol.29
, Issue.12
, pp. 84-89
-
-
Hammond, L.1
Nayfeh, B.A.2
Olukotun, K.3
-
4
-
-
0032685104
-
Improving the Performance of Speculatively Parallel Applications on the Hydra CMP
-
Rhodes, Greece, June
-
Kunle Olukotun, Lance Hammond, and Mark Willey, "Improving the Performance of Speculatively Parallel Applications on the Hydra CMP", Proceedings of the 1999 ACM International Conference on Supercomputing, Rhodes, Greece, June 1999.
-
(1999)
Proceedings of the 1999 ACM International Conference on Supercomputing
-
-
Olukotun, K.1
Hammond, L.2
Willey, M.3
-
5
-
-
0029547346
-
The M-Machine Multiprocessor
-
November
-
th International Symposium on Microarchitecture, pages 146-156, November, 1995
-
(1995)
th International Symposium on Microarchitecture
, pp. 146-156
-
-
Fillo, M.1
Keckler, S.2
Dally, W.3
Carter, N.4
Chang, A.5
Gurevich, Y.6
Lee, W.7
-
9
-
-
0030232590
-
Dynamic scheduling in RISC architectures
-
September
-
A.Bolychevsky, C.R.Jesshope, V.B.Muchnick, "Dynamic scheduling in RISC architectures", IEE Proc.-Comput. Digit. Tech. Vol.143, No.5, September 1996
-
(1996)
IEE Proc.-Comput. Digit. Tech.
, vol.143
, Issue.5
-
-
Bolychevsky, A.1
Jesshope, C.R.2
Muchnick, V.B.3
-
10
-
-
84962864913
-
-
Copyright 1996, MIPS Technologies, Inc. - 09 DEC 96, Version 2.0
-
R10000 Microprocessor User's Manual, Copyright 1996, 1997, MIPS Technologies, Inc. - 09 DEC 96, Version 2.0
-
(1997)
R10000 Microprocessor User's Manual
-
-
-
13
-
-
0003719406
-
-
Morgan Kaufmann Publishers, Inc., San Francisco, California, February
-
David A. Patterson and John L. Hennessy, "Computer Organization and Design: The Hardware/Software Interface", Morgan Kaufmann Publishers, Inc., San Francisco, California, February 1999
-
(1999)
Computer Organization and Design: The Hardware/Software Interface
-
-
Patterson, D.A.1
Hennessy, J.L.2
-
14
-
-
0031237789
-
Simultaneous Multithreading: A Platform for Next-generation Processors
-
September/October
-
Susan Eggers, Joel Emer, Henry Levy, Jack Lo, Rebecca Stamm, and Dean Tullsen, "Simultaneous Multithreading: A Platform for Next-generation Processors", IEEE Micro, September/October 1997, pages 12-18.
-
(1997)
IEEE Micro
, pp. 12-18
-
-
Eggers, S.1
Emer, J.2
Levy, H.3
Lo, J.4
Stamm, R.5
Tullsen, D.6
-
16
-
-
84962865290
-
-
Copyright 1996, MIPS Technologies, Inc. - 21 MAR 96, 2nd Edition
-
R4400 Microprocessor User's Manual, Copyright 1996, MIPS Technologies, Inc. - 21 MAR 96, 2nd Edition
-
R4400 Microprocessor User's Manual
-
-
-
17
-
-
0032067773
-
Maximizing parallelism and minimizing synchronization with affine partitions
-
Computer Systems Laboratory, Stanford University, Stanford, CA 94305, USA
-
Amy W. Lim, Monica S. Lam, "Maximizing parallelism and minimizing synchronization with affine partitions", Parallel Computing 24 1998 445-475, Computer Systems Laboratory, Stanford University, Stanford, CA 94305, USA
-
(1998)
Parallel Computing
, vol.24
, pp. 445-475
-
-
Lim, A.W.1
Lam, M.S.2
-
18
-
-
0032067773
-
-
May
-
Parallel Computing, Vol. 24, Issue 3-4, May 1998, Pages 445-475
-
(1998)
Parallel Computing
, vol.24
, Issue.3-4
, pp. 445-475
-
-
-
19
-
-
0029480935
-
Compiler Technology for Future Microprocessors
-
December
-
W. W. Hwu, R. E. Hank, D. M. Gallagher, S. A. Mahlke, D. M. Lavery, G. E. Haab, J. C. Gyllenhaal, and D. I. August, "Compiler Technology for Future Microprocessors", Proceedings of the IEEE, Vol. 83, No. 12, December 1995, pp. 1625-1640.
-
(1995)
Proceedings of the IEEE
, vol.83
, Issue.12
, pp. 1625-1640
-
-
Hwu, W.W.1
Hank, R.E.2
Gallagher, D.M.3
Mahlke, S.A.4
Lavery, D.M.5
Haab, G.E.6
Gyllenhaal, J.C.7
August, D.I.8
-
20
-
-
0031364101
-
Tuning Compiler Optimizations for Simultaneous Multithreading
-
Dec. 1-3
-
Jack Lo, Susan Eggers, Henry Levy, Sujay Parekh, and Dean Tullsen, "Tuning Compiler Optimizations for Simultaneous Multithreading", In 30th Annual International Symposium on Microarchitecture (Micro-30), Dec. 1-3, 1997, p. 114-124.
-
(1997)
30th Annual International Symposium on Microarchitecture (Micro-30)
, pp. 114-124
-
-
Lo, J.1
Eggers, S.2
Levy, H.3
Parekh, S.4
Tullsen, D.5
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