Speculative parallelization using state separation and multiple value prediction

International Symposium on Memory Management, ISMM

Volumn , Issue , 2010, Pages 63-72

  Tian, Chen ^a   Feng, Min ^a   Gupta, Rajiv ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

multicore processors; speculative parallelization

Indexed keywords

ADAPTIVE SCHEME; BENCHMARK PROGRAMS; CHIP MULTIPROCESSORS; COMPILER TECHNIQUES; COMPUTATION OVERHEADS; CPU UTILIZATION; IMPROVING PERFORMANCE; LOOP ITERATION; MEMORY STATE; MULTI-CORE PROCESSOR; RUNTIMES; SEQUENTIAL PROGRAMS; SIMULTANEOUS MULTI-THREADING; SPECULATIVE PARALLELIZATION; SPEED-UPS; STATE SEPARATION; THREAD LEVEL PARALLELISM; VALUE PREDICTION;

MULTITASKING; PROGRAM COMPILERS; VALUE ENGINEERING;

STRUCTURED PROGRAMMING;

EID: 77954735655     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1806651.1806663     Document Type: Conference Paper

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