Disjoint eager execution: an optimal form of speculative execution

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1995, Pages 313-325

  Uht, Augustus K ^a   Sindagi, Vijay ^a   Hall, Kelley ^a  

^a UNIVERSITY OF RHODE ISLAND   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER HARDWARE; COMPUTER SOFTWARE; CONCURRENT ENGINEERING; OPTIMAL SYSTEMS; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; PERFORMANCE; SOFTWARE ENGINEERING;

BRANCH PREDICTION; DISJOINT EAGER EXECUTION; INSTRUCTION LEVEL PARALLELISM; MINIMAL CONTROL DEPENDENCY; SPECULATIVE EXECUTION;

COMPUTER ARCHITECTURE;

EID: 0029514936     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/micro.1995.476841     Document Type: Conference Paper

References (15)