ShapeUp: A high-level design approach to simplify module interconnection on FPGAs

Proceedings - IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2010

Volumn , Issue , 2010, Pages 141-148

  Neely, Christopher ^a   Brebner, Gordon ^a   Shang, Weijia ^b  

^a XILINX INC   (United States)

^b Santa Clara University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION PATTERN; COMPLEX SYSTEMS; CUSTOMER DESIGN; DESIGNING SYSTEMS; FPGA DEVICES; HIGH-LEVEL APPROACH; HIGH-LEVEL DESIGN; INTER-MODULE; INTERCONNECTED MODULES; IP BLOCK; MEMORY MODULES; MODULAR DESIGNS; MULTI-LEVEL; NETWORKING SYSTEMS; PLUG AND PLAY; PROGRAMMABILITY; SIMULATION CAPABILITY; TOOLSUITE;

COMPUTERS; FORMAL LOGIC; METADATA;

DESIGN;

EID: 77954302853     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2010.30     Document Type: Conference Paper

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