Several key issues on implementing delay line based TDCs using FPGAs

IEEE Transactions on Nuclear Science

Volumn 57, Issue 3 PART 3, 2010, Pages 1543-1548

  Wu, Jinyuan ^a  

^a FERMI NATIONAL ACCELERATOR LABORATORY   (United States)

Author keywords

Fast timing; Front end electronics; Time to digital converters

Indexed keywords

COMMON PROBLEMS; DELAY LINE; DESIGN APPROACHES; ENCODING LOGIC; FAST TIMING; FRONT END ELECTRONICS; KEY ISSUES; MULTIPLE MEASUREMENTS; PROCESSING STAGE; SINGLE-ENDED SIGNALS; TIME COUNTERS; TIME TO DIGITAL CONVERTERS;

BINS; WAVES;

TIME MEASUREMENT;

EID: 77953691785     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2010.2045901     Document Type: Article

References (11)

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