EUV lithography at the 22nm technology node

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7636, Issue , 2010, Pages

  Wood, Obert ^a   Koay, Chiew Seng ^b   Petrillo, Karen ^b   Mizuno, Hiroyuki ^c   Raghunathan, Sudhar ^b   Arnold, John ^b   Horak, Dave ^b   Burkhardt, Martin ^b   Mcintyre, Gregory ^b   Deng, Yunfei ^a   La Fontaine, Bruno ^a   Okoroanyanwu, Uzo ^a   Wallow, Tom ^a   Landie, Guillaume ^d   Standaert, Theodorus ^b   Burns, Sean ^b   Waskiewicz, Christopher ^b   Kawasaki, Hirohisa ^c   Chen, James H C ^b   Colburn, Matthew ^b   Haran, Bala ^b   Fan, Susan S C ^b   Yin, Yunpeng ^b   Holfeld, Christian ^e   Techel, Jens ^e   Peters, Jan Hendrik ^e   Bouten, Sander ^f   Lee, Brian ^f   Pierson, Bill ^f   Kessels, Bart ^f   Routh, Robert ^f   Cummings, Kevin ^f   more..

^a IBM MICROELECTRONICS   (United States)

^b IBM   (United States)

^c Toshiba America Inc   (United States)

^d STMICROELECTRONICS   (Italy)

^e AMTC   (Germany)

^f ASML US Inc   (United States)

Author keywords

EUV device integration; EUV mask; EUV OPC; EUV resist process; EUVL; Extreme ultraviolet lithography

Indexed keywords

193NM IMMERSION LITHOGRAPHY; CRITICAL ISSUES; DEFECTIVITY; DEVICE INTEGRATION; DOUBLE EXPOSURE; EUV LITHOGRAPHY; EUV MASK; EUV OPC; EUV RESISTS; HIGHER YIELD; INTERCONNECT LEVELS; SEMICONDUCTOR PROCESS; TECHNOLOGY NODES; TECHNOLOGY READINESS; TEST CHIPS;

INTEGRATION; MASKS; NANOTECHNOLOGY; PRINTING; TECHNOLOGY;

EXTREME ULTRAVIOLET LITHOGRAPHY;

EID: 77953460061     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.847049     Document Type: Conference Paper

References (10)

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