A reconfigurable cache memory with heterogeneous banks

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2010, Pages 825-830

  Benitez, Domingo ^a   Moure, Juan C ^b   Rexachs, Dolores ^b   Luque, Emilio ^b  

^a UNIVERSITY OF LAS PALMAS DE GRAN CANARIA   (Spain)

^b UNIVERSITAT AUTÒNOMA DE BARCELONA   (Spain)

Author keywords

Cache; Dynamic adaptation; Processor evaluation

Indexed keywords

ENERGY UTILIZATION;

CACHE; CACHE CONFIGURATIONS; DYNAMIC ADAPTATIONS; IMPROVING PERFORMANCE; LEARNING MECHANISM; PROCESSOR EVALUATION; RECONFIGURATION ALGORITHM; REDUCING ENERGY CONSUMPTION;

CACHE MEMORY;

EID: 77953087846     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2010.5456936     Document Type: Conference Paper

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