Bit section instruction set extension of ARM for embedded applications

Proceedings of the 2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES '02

Volumn , Issue , 2002, Pages 69-78

  Li, Bengu ^a   Gupta, Rajiv ^a  

^a University of Arizona   (United States)

Author keywords

Bit section operations; Multimedia data; Network processing

Indexed keywords

ARM INSTRUCTION SET; ARM PROCESSOR; BENCHMARK SUITES; CODE SIZE; COMMERCIAL NETWORKS; EMBEDDED APPLICATION; EMBEDDED DOMAINS; EMBEDDED PROCESSORS; EXECUTION TIME; INSTRUCTION SET; INSTRUCTION SET EXTENSION; MEDIA PROCESSING; MEMORY OVERHEADS; MICHIGAN; MULTIMEDIA DATA; NARROW WIDTH; NETWORK PROCESSING; RUNTIMES; SIMPLESCALAR; SUBWORDS;

COMPUTER ARCHITECTURE; DATA PROCESSING; INDUSTRIAL RESEARCH; NANOTECHNOLOGY; PROGRAM COMPILERS; SYNTHESIS (CHEMICAL); TEACHING;

EMBEDDED SYSTEMS;

EID: 77952991737     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/581630.581642     Document Type: Conference Paper

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