3D 65nm CMOS with 320°C microwave dopant activation

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Lee, Yao Jen ^a   Lu, Yu Lun ^b   Hsueh, Fu Kuo ^a   Huang, Kuo Chin ^b   Wan, Chia Chen ^b   Cheng, Tz Yen ^b   Han, Ming Hung ^b   Kowalski, Jeff M ^c   Kowalski, Jeff E ^c   Heh, Dawei ^a   Chuang, Hsi Ta ^a   Li, Yiming ^a,b   Chao, Tien Sheng ^b   Wu, Ching Yi ^d   Yang, Fu Liang ^a  

^a NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c DSG Technologies Inc   (United States)

^d DA YEH UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL LENGTH; DOPANT ACTIVATION; LOW COSTS; LOW TEMPERATURE MICROWAVES; LOW TEMPERATURES; NANO-METER-SCALE; POLY-SI GATES; SOURCE/DRAIN JUNCTIONS; UPPER LAYER;

CMOS INTEGRATED CIRCUITS; ELECTRON DEVICES; MICROWAVES; POLYSILICON; THREE DIMENSIONAL;

THIN FILM TRANSISTORS;

EID: 77952418685     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424426     Document Type: Conference Paper

References (9)

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