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Volumn 5953 LNCS, Issue , 2010, Pages 347-356

Energy dissipation reduction of a cardiac event detector in the sub-V t domain by architectural folding

Author keywords

Cardiac pacemaker; Energy model; Folding; QRS detection; Sub threshold; Time multiplexing; Wavelet filterbank

Indexed keywords

CARDIAC PACEMAKERS; ENERGY MODEL; QRS DETECTION; SUBTHRESHOLD; TIME MULTIPLEXING;

EID: 77951132920     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-11802-9_39     Document Type: Conference Paper
Times cited : (1)

References (12)
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    • Energy efficiency comparison of asynchronous and synchronous circuits operating in the sub-threshold regime
    • Akgun, O., Leblebici, Y.: Energy Efficiency Comparison of Asynchronous and Synchronous Circuits Operating in the Sub-Threshold Regime. J. Low Power Electronics 3(3), 320-336 (2008)
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    • Akgun, O.1    Leblebici, Y.2
  • 2
    • 33344468504 scopus 로고    scopus 로고
    • Wavelet-based event detection in implantable cardiac rhythm management devices
    • March
    • ?Astr̈om, M., Olmos, S., S̈ornmo, L.: Wavelet-based event detection in implantable cardiac rhythm management devices. IEEE Trans. Biomed. Eng. 53(3) (March 2006)
    • (2006) IEEE Trans. Biomed. Eng. , Issue.53 , pp. 3
    • Astr̈om, M.1    Olmos, S.2    S̈ornmo, L.3
  • 3
    • 25144514874 scopus 로고    scopus 로고
    • Modeling and sizing for minimum energy operation in subthreshold circuits
    • Calhoun, B., Wang, A., Chandrakasan, A.: Modeling and sizing for minimum energy operation in subthreshold circuits. IEEE Journal of Solid-State Circuits 40(9), 1778-1786 (2005)
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , Issue.9 , pp. 1778-1786
    • Calhoun, B.1    Wang, A.2    Chandrakasan, A.3
  • 10
    • 11944273157 scopus 로고    scopus 로고
    • A 180-mV subthreshold FFT processor using a minimum energy design methodology
    • Wang, A., Chandrakasan, A.: A 180-mV subthreshold FFT processor using a minimum energy design methodology. IEEE Journal of Solid-State Circuits 40(1), 310-319 (2005)
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , Issue.1 , pp. 310-319
    • Wang, A.1    Chandrakasan, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.