Fault-tolerant router with built-in self-test/self-diagnosis and fault-isolation circuits for 2D-mesh based chip multiprocessor systems

2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09

Volumn , Issue , 2009, Pages 72-75

  Lin, Shu Yen ^a   Shen, Wen Chung ^a   Hsu, Chan Cheng ^a   Chao, Chih Hao ^a   Wu, An Yeu ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP MULTIPROCESSOR; FAULT-TOLERANT; ROUTER DESIGN;

DESIGN; MULTIPROCESSING SYSTEMS; RAILROAD TUNNELS;

ROUTERS;

EID: 77950636964     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VDAT.2009.5158098     Document Type: Conference Paper

References (11)

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