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Volumn 53, Issue 3, 2010, Pages 17-19

III-V MOSFETs: Beyond silicon technology

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL MATERIALS; CMOSFETS; COINTEGRATION; GRAND CHALLENGE; INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS; LOW POWER PERFORMANCE; MOSFETS; PROCESS FLOWS; SILICON PLATFORMS; SILICON TECHNOLOGIES; STRAINED SILICON; TECHNOLOGY NODES;

EID: 77950552972     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article
Times cited : (3)

References (14)
  • 7
    • 0023012783 scopus 로고
    • Review of rapid thermal annealing of ion implanted GaAs
    • 7. S.S. Gill, BJ. Sealy, "Review of Rapid Thermal Annealing of Ion Implanted GaAs," Jour. of The ECS, vol.133, 1986, pp. 2590-2596. (Pubitemid 17599138)
    • (1986) Journal of the Electrochemical Society , vol.133 , Issue.12 , pp. 2590-2596
    • Gill, S.1    Sealy, B.J.2
  • 9
    • 71049149274 scopus 로고    scopus 로고
    • 0.47as n-MOSFETs: Performance boost with in situ doped lattice-mismatched source/drain stressors and interface engineering
    • 0.47As n-MOSFETs: Performance Boost with In situ Doped Lattice-Mismatched Source/Drain Stressors and Interface Engineering," VLSI Tech. Dig., 2009, pp. 244-245.
    • (2009) VLSI Tech. Dig. , pp. 244-245
    • Chin, H.C.1    Gong, X.2    Liu, X.3    Lin, Z.4    Yeo, Y.C.5
  • 11
    • 0032142245 scopus 로고    scopus 로고
    • Simulation and design of InAlAs/InGaAs pnp heterojunction bipolar transistors
    • S. Datta, S. Shi, K. Roenker, M. Cahay, W. Stanchina, Simulation and Design of InAlAs/InGaAs pnp Heterojunction Bipolar Transistors," IEEE Trans. on Electron Devices, vol. 45, 1998, pp. 1634-1643.
    • (1998) IEEE Trans. on Electron Devices , vol.45 , pp. 1634-1643
    • Datta, S.1    Shi, S.2    Roenker, K.3    Cahay, M.4    Stanchina, W.5
  • 12
  • 14
    • 0025402410 scopus 로고
    • Monolithic process for Co-integration of GaAs MESFET and silicon CMOS devices and circuits
    • H. Shichijo, R. Matyi, A. Taddiken, Y. Kao, "Monolithic Process for Co-integration of GaAs MESFET and Silicon CMOS Devices and Circuits," IEEE Trans. on Electron Devices, vol.37, 1990, pp. 548-555.
    • (1990) IEEE Trans. on Electron Devices , vol.37 , pp. 548-555
    • Shichijo, H.1    Matyi, R.2    Taddiken, A.3    Kao, Y.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.