Digital controller for DVS-enabled DCDC converter

IEEE Transactions on Power Electronics

Volumn 25, Issue 3, 2010, Pages 557-573

  Barai, Mukti ^a   Sengupta, Sabyasachi ^a   Biswas, Jayanta ^b  

^a INDIAN INSTITUTE OF TECHNOLOGY   (India)

^b INTERNATIONAL INSTITUTE OF INFORMATION TECHNOLOGY   (India)

Author keywords

Analog digital converter (ADC); Dc dc power converter; Delay line; Digital controller; Dynamic voltage scaling (DVS)

Indexed keywords

ANALOG-DIGITAL CONVERTER; CLOCK FREQUENCY; CLOSED-LOOP; CMOS TECHNOLOGY; DC-DC POWER CONVERTER; DELAY LINE; DIGITAL COMPENSATORS; DIGITAL CONTROLLER DESIGNS; DIGITAL CONTROLLERS; DYNAMIC VOLTAGE SCALING; ERROR VALUES; FAST DYNAMIC RESPONSE; FEEDBACK ERROR; HIGH FREQUENCY; HIGH FREQUENCY HF; HYBRID DPWM; INTEGRATED DESIGNS; LOOK UP TABLE; ON CHIPS; OUTPUT VOLTAGES; OUTPUT-VOLTAGE RANGES; PULSE WIDTH MODULATORS; REFERENCE VALUES; SYNCHRONOUS BUCK CONVERTER; SYNOPSYS; TARGET FREQUENCIES; TEMPERATURE VARIATION;

ANALOG TO DIGITAL CONVERSION; CLOCKS; CMOS INTEGRATED CIRCUITS; CONTROLLERS; DESIGN; DYNAMIC RESPONSE; ELECTRIC POWER MEASUREMENT; FREQUENCY CONVERTERS; MULTICARRIER MODULATION; POWER CONVERTERS; TABLE LOOKUP; TARGETS; WAVES;

VOLTAGE STABILIZING CIRCUITS;

EID: 77950539436     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2009.2030195     Document Type: Article

References (46)

1. B. Arbetter and D. Maksimovic, "Control method for low-voltage DC power supply in battery-powered systems with power management," in Proc. IEEE Power Electron. Spec. Conf. Rec., 1997, pp. 1198-1204.
2. T. D. Burd and R. W. Brodersen, "Design issues for dynamic voltage scaling," in Proc. IEEE Int. Symp. Low Power Electron. Des., 2000, pp. 9- 14.
3. C. Zhang, D. Ma, and A. Srivastava, "Integrated adaptive DC-DC conversion with adaptive pulse-train technique for low-ripple fast-response regulation," in Proc. IEEE Int. Symp. Low power Electron. Des., Aug. 2004, pp. 257-262. (Pubitemid 40454722)
4. O. Trescases and W. Tung Ng, "Variable output, soft-switching DC/DC converter for VLSI dynamic voltage scaling power supply applications," in Proc. IEEE Power Electron. Spec. Conf., Jun. 2004, pp. 4149- 4155.
5. T. D. Burd, T. A. Pering, A. J. Stratakos, and R.W. Brodersen, "A dynamic voltage scaled microprocessor system," IEEE J. Solid-State Circuits, vol.35, no.11, pp. 1571-1580, Nov. 2000. (Pubitemid 32070549)
6. A. J. Stratakos, S. R. Sanders, and R.W. Brodersen, "A low-voltage cmos DC-DC converter for a portable battery-operated systems," in Proc. IEEE Power Electron. Spec. Conf., Jun. 1994, vol.1, pp. 619-626.
7. Technical white paper for Crusoe processor. (2002). [Online]. Available: http://www.transmeta.com
8. S. Dhar and D. Maksimovic, "Switching regulator with dynamically adjustable supply voltage for low power VLSI," in Proc. IEEE Ind. Electron. Soc., Dec. 2001, pp. 1874-1879. (Pubitemid 34078858)
9. TI. Inc., "Adjustable, 800-mA 3-MHz synchronous step-down converter," Texas Instruments, Data Sheet, TPS62352, 2007.
10. A. R. Oliva, S. S. Ang, and G. E. Bortolotto, "Digital control of a voltage mode synchronous buck converter," IEEE Trans. Power Electron., vol.21, no.1, pp. 157-163, Jan. 2006.
11. A. Peterchev and S. R. Sanders, "Load-line regulation with estimated load-current feedforward: Application to Microprocessor voltage regulators," IEEE Trans. Power Electron., vol.21, no.6, pp. 1704-1717, Nov. 2006. (Pubitemid 44824216)
12. M. Castilla, L. G. Vicuna, J.M. Guerrero, J.Miret, and N. Berbel, "Simple low-cost Hysteretic controller for single phase synchronous buck converters," IEEE Trans. Power Electron., vol.22, no.4, pp. 1232-1241, Jul. 2007. (Pubitemid 47098824)
13. S. Saggini, D. Trevisan, P. Mattavelli, and M. Ghioni, "Synchronousasynchronous digital voltage-mode control for DC-DC converters," IEEE Trans. Power Electron., vol.22, no.4, pp. 1261-1268, Jul. 2007. (Pubitemid 47098827)
14. S. Saggini, P.Mattavelli, M. Ghioni, and M. Redaelli, "Mixed signal voltage mode control for DC-DC converters with inherent analog derivative action," IEEE Trans. Power Electron., vol.23, no.3, pp. 1485-1493, May 2008. (Pubitemid 351756720)
15. G. Feng, E. Meyer, and Y. Liu, "A new digital control algorithm to achieve optimal dynamic performance inDC-DC converters," IEEE Trans. Power Electron., vol.22, no.4, pp. 1489-1498, Jul. 2007. (Pubitemid 47098850)
16. E. Meyer, Z. Zhang, and Y. Liu, "An optimal control method for buck converters using a prctical capacitor charge balance technique," IEEE Trans. Power Electron., vol.22, no.4, pp. 1802-1812, Jul. 2007.
17. Z. Zhao and A. Prodic, "Continuous-time digital controllers for highfrequency DC-DC converters," IEEE Trans. Power Electron., vol.23, no.2, pp. 564-573, Mar. 2008. (Pubitemid 351460498)
18. A.V. Peterchev and S. Sanders, "Digital multimode buck converter control with Loss-Minimizing synchronous rectifier adaptation," IEEE Trans. Power Electron., vol.21, no.6, pp. 1588-1599, Nov. 2006. (Pubitemid 44824204)
19. W. Liou, M. Yeh, and Y. L. Kuo, "A high efficiency Dual-Mode buck converter IC for portable applications," IEEE Trans. Power Electron., vol.23, no.2, pp. 667-677, Mar. 2010. (Pubitemid 351460509)
20. H. Hu, V. Yousefzadeh, and D. Maksimovic, "Nonuniform A/D quantization for improved dynamic responses of digitally controlled DC-DC converters," IEEE Trans. Power Electron., vol.23, no.4, pp. 1998-2005, Jul. 2008.
21. W. Eberle, Z. Zhang, Y. Liu, and P. C. Sen, "A practical switching loss model for buck voltage regulators," IEEE Trans. Power Electron., vol.24, no.3, pp. 700-713, Mar. 2009.
22. S. Xiao,W. Qiu, G.Miller, T. X.Wu, and I. Batarseh, "An active compensator scheme for dynamic voltage scaling of voltage regulators," IEEE Trans. Power Electron., vol.24, no.1, pp. 307-311, Jan. 2009.
23. P. Degen, H. Groot, R. Pagano, F. Fansier, and K. Schetters, "A power management unit with integrated stand-by supply for computer motherboards: Control and VLSI design," IEEE Trans. Power Electron., vol.23, no.4, pp. 2093-2105, Jul. 2008.
24. F. L. Luo, "Digital power electronics," in Proc. IEEE Ind. Electron. Appl. Conf., May 2006, pp. 1-6.
25. B. J. Patella, A. Prodic, A. Zirger, and D. Maksimovic, "High-frequency digital pwm controller IC for DC-DC converters," IEEE Trans. Power Electron., vol.18, no.1, pp. 438-446, Jan. 2003. (Pubitemid 34661050)
26. J. Xiao, A. Peterchev, and S. R. Sanders, "Architecture and IC implementation of a digital VRM controller," in Proc. IEEE Power Electron. Spec. Conf., Jun. 2001, pp. 38-47. (Pubitemid 32950201)
27. J. Karttunen and T. Rahkonen, "A PLL-Based real-time adaptation circuit for digital error correction of a pipeline A/D converter," in Proc. 24th Norchip Conf., Nov. 2006, pp. 163-166. (Pubitemid 47133288)
28. G.Wei and M. Horowitz, "A fully digital, energy-efficient adaptive powersupply regulator," IEEE J. Solid-State Circuits, vol.34, no.4, pp. 520-528, Apr. 1999.
29. A. Prodic and D. Maksimovic, "Design of a digital PID regulator based on look-up tables for control of high-frequency DC-DC converters," in Proc. IEEE Comput. Power Electron., Jun. 2002, pp. 18-22.
30. T. Sakurai and A. R. Newton, "Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas," IEEE J. Solid-State Circuits, vol.SC-25, no.2, pp. 584-594, Apr. 1990. (Pubitemid 20701405)
31. M. Barai, S. SenGupta, and J. Biswas, "Dual mode multiple band digital controller for high frequency DC-DC converter," IEEE Trans. Power Electron., vol.24, no.3, pp. 752-766, Mar. 2009.
32. G. F. Franklin, J. D. Powell, and A. Emami-Naeini, Feedback Control of Dynamic Systems, 3rd ed. Reading, MA: Addision-Wesley, 1994.
33. J. L. Tong and J. P. Bobis, "A model for designing digital PID controllers," in Proc. Int. Conf. Power Electron. Motion Control, Nov. 1992, pp. 1157- 1162.
34. Y. Y. Li, A. D. Sheng, and Y. G.Wang, "Synthesis of PID controllers with regional pole constraints," in Proc. Int. Conf. Control, Autom., Robot. Vis., Dec. 2004, pp. 1842-1846.
35. J. C. Basilio and S. R. Matos, "Design of PI and PID controllers with transient performance specification," IEEE Trans. Educ., vol.45, no.4, pp. 364-370, Nov. 2002. (Pubitemid 35428476)
36. L. Guo, J. Y. Hung, and R. M. Nelms, "Digital controller design for buck and boost converters using root locus techniques," in Proc. IEEE Ind. Electron. Conf., Nov. 2003, pp. 1864-1869.
37. O. Linlin, T. Youchun, G. Danying, and Z. Weidong, "Stability analysis of PID controllers for integral processes with time delay," in Proc. Amer. Control Conf., Jun. 2005, pp. 4247-4252. (Pubitemid 41188917)
38. A. Karimi, D. Garcia, and R. Longchamp, "PID controller tuning using Bode's integrals," IEEE Trans. Control Syst. Technol., vol.11, no.6, pp. 812-821, Nov. 2003.
39. L. H. Keel and S. P. Bhattacharyya, "Stability margins and digital implementation of controllers," in Proc. Amer. Control Conf., Jun. 1998, pp. 2852-2856.
40. M. Y. Chui, W. Ki, and C. Tsui, "A programmable integrated digital controller for switching converters with dual-band switching and complex pole-zero compensation," IEEE J. Solid-State Circuits, vol.40, no.3, pp. 772-780, Mar. 2005. (Pubitemid 40448834)
41. A. Syed, E. Ahmed, E. Alarcon, and D. Maksimovic, "Digital pulsewidth modulator architectures," in Proc. IEEE Power Electron. Spec. Conf., Jun. 2004, pp. 4689-4695.
42. K.Wang, N. Rahman, Z. Lukic, andA. Prodic, "All-digitalDPWM/DPFM controller for low-power dc-dc converters," in Proc. 21st Ann. IEEE Appl. Power Electron. Conf. Expo. (APEC 2006), Mar., 5 (Pubitemid 44523482)
43. Synopsys electronic design automation tools. (2007). [Online]. Available: http://www.synopsys.com
44. National Semiconductor. National Semiconductor 0.5 m CMOS Library. [Online]. Available: http://www.national.com
45. C. Zhang, D. Ma, and A. Srivastava, "Integrated adaptive DC-DC conversion with adaptive pulse-train technique for low-ripple fast-response regulation," in Proc. IEEE Int. Symp. Low power Electron. Des., Aug. 2004, pp. 257-262. (Pubitemid 40454722)
46. D. Kang, Y. Kim, and J. T. Doyle, "A high-Efficiency fully digital synchronous buck converter power delivery system based on a finite-state machine," IEEE Trans. VLSI Syst., vol.14, no.3, pp. 229-240, Mar. 2006.