Integrated adaptive DC/DC conversion with adaptive pulse-train technique for low-ripple fast-response regulation

Proceedings of the 2004 International Symposium on Lower Power Electronics and Design, ISLPED'04

Volumn , Issue , 2004, Pages 257-262

  Zhang, Chuang ^a   Ma, Dongsheng ^b   Srivastava, Ashok ^a  

^a LOUISIANA STATE UNIVERSITY   (United States)

^b University of Arizona   (United States)

Author keywords

Adaptive output; Adaptive pulse train technique; DC DC conversion; Low ripple; Transient response

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; DIGITAL CIRCUITS; INTEGRATED CIRCUIT LAYOUT; PERSONAL DIGITAL ASSISTANTS; TRANSIENTS; VOLTAGE CONTROL;

ADAPTIVE OUTPUT; ADAPTIVE PULSE-TRAIN TECHNIQUE; DC/DC CONVERSION; LOW RIPPLE RESPONSE; TRANSIENT RESPONSE;

POWER CONVERTERS;

EID: 16244392739     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1013235.1013301     Document Type: Conference Paper

References (10)

1. Gutnik, V. and Chandrakasan A., Embedded power supply for low-power DSP, IEEE Trans. VLSI Syst., 5, (Dec. 1997), 425-435.
2. Johnson, M. and Roy, K., Scheduling and optimal voltage selection for low power multi-voltage DSP datapaths, in Proc. IEEE Int. Symp. Circuits and Systems, 3, (May 1997), 2152-2155.
3. Pering, T., Burd, T. and Brodersen, R., Voltage Scheduling in the IPARM Microprocessor System, Proc. of Int. Symp. on Low Power Electronics and Design, Digest of Technique Papers, 2000, 96-100.
4. Burd, T. and Brodersen, R., Design Issues for Dynamic Voltage Scaling, Proc. Of Int. Symp. on Low Power Electronics and Design, Digest of Technique Papers, 2000, 9-14.
5. Kao, J., Miyazaki, M. and Chandrakasan, P., A 175-mV Multiply-Accumulate Unit Using an Adaptive Supply Voltage and Body Bias Architecture, IEEE J. of Solid State Circuits, 37, 11, (Nov. 2002), 1545-1554.
6. Ma, D., Ki, W-H. and Tsui, C.Y., An Integrated One-Cycle Control Buck Converter with Adaptive Output and Dual Loops for Output Error Correction, IEEE J. of Solid-State Circuits, 39, 1, (Jan. 2004), 140-147.
7. Buso, S., Mattavelli, P. Rossetto, L. and Spiazzi, G., Simple Digital Converter Improving Dynamic Performance of Power Factor Preregulators, IEEE Trans. on Power Electronics, 13, (Sept. 1998), 814-823.
8. Patella, B., Prodic, A., Zirger, A. and Maksimovic, D., High-frequency Digital PWM Controller IC for DC-DC Converters, IEEE Trans. on Power Electronics, 18, (Jan. 2003), 438-446.
9. Kim, J., Horowitz, M., Adaptive Supply Serial Links with Sub-1-V Operation and Per-pin Clock Recovery, IEEE J. Solid-State Circuits, 37, (Nov. 2002), 1403-1413.
10. Telefus, M., Shteynburg, A., Ferdowsi, M. and Emadi, A., Pulse Train, A Novel Digital Control Method, Applied to a Discontinuous Mode Flyback Converter, IEEE Annual Power Electronics Specialists Conference, 3, 2003, 1141-1146.