FPGA implementation of the generalized hough transform

ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs

Volumn , Issue , 2009, Pages 172-177

  Geninatti, Sergio Rubén ^a   Benítez, José Ignacio Benavides ^b   Calviño, Manuel Hernández ^c   Mata, Nicolás Guil ^d   Luna, Juan Gómez ^b  

^a UNIVERSIDAD NACIONAL DE ROSARIO   (Argentina)

^b UNIVERSITY OF CÓRDOBA   (Spain)

^c UNIVERSITY OF HAVANA   (Cuba)

^d UNIVERSITY OF MÁLAGA   (Spain)

Author keywords

Concurrent calculation; Edge detection; FPGA; Hough transform; Video analysis; Video segmentation

Indexed keywords

CLOCK CYCLES; CONCURRENT CALCULATION; DATA FLOW; FPGA IMPLEMENTATIONS; FUNCTIONAL BLOCK; GENERALIZED HOUGH TRANSFORM; IMAGE PROCESSING TECHNIQUE; MEMORY REQUIREMENTS; MEMORY SAVINGS; SIMILARITY CALCULATION; SIMILARITY MEASURE; SPECIFIC HARDWARE; VIDEO ANALYSIS; VIDEO SEGMENTATION; VIDEO SEQUENCES;

COMPUTATIONAL EFFICIENCY; CONTENT BASED RETRIEVAL; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; HOUGH TRANSFORMS; IMAGE ANALYSIS; VIDEO RECORDING;

EDGE DETECTION;

EID: 77950480168     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ReConFig.2009.78     Document Type: Conference Paper

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