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Volumn , Issue , 2008, Pages 6561-6564

An improved canny edge detector and its realization on FPGA

Author keywords

Canny algorithm; FPGA; Self adapt; Threshold

Indexed keywords

DETECTORS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INDUSTRIAL ENGINEERING; INTELLIGENT CONTROL; SIGNAL PROCESSING;

EID: 52149117148     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/WCICA.2008.4594570     Document Type: Conference Paper
Times cited : (56)

References (10)
  • 2
    • 0031272557 scopus 로고    scopus 로고
    • A discrete expression of Canny's criteria for step edge detector performances evaluation
    • D. Demigny, and T. Kamle,"A discrete expression of Canny's criteria for step edge detector performances evaluation",IEEE Transactions on Pattern Analysis and Machine Intelligence,19(6), pp. 1199-1211, 1997
    • (1997) IEEE Transactions on Pattern Analysis and Machine Intelligence , vol.19 , Issue.6 , pp. 1199-1211
    • Demigny, D.1    Kamle, T.2
  • 8
    • 0031338579 scopus 로고    scopus 로고
    • Efficient ASIC and FPGA implementations of IIR filters for real time edge detection
    • Lorca F.G., Kessal L., Demigny D., "Efficient ASIC and FPGA implementations of IIR filters for real time edge detection", International Conference on Image Processing, vol. 2, pp. 406-409, 1997
    • (1997) International Conference on Image Processing , vol.2 , pp. 406-409
    • Lorca, F.G.1    Kessal, L.2    Demigny, D.3
  • 10
    • 52149115443 scopus 로고    scopus 로고
    • Introduction to the Quartus II Software, Version 7.1, Altera Inc, 2006, pp. 152-174
    • Introduction to the Quartus II Software, Version 7.1, Altera Inc., 2006, pp. 152-174.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.