Accelerating matrix product on reconfigurable hardware for image processing applications

IEE Proceedings: Circuits, Devices and Systems

Volumn 152, Issue 3, 2005, Pages 236-246

  Bensaali, F ^a   Amira, A ^a   Bouridane, A ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COST EFFECTIVENESS; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS; HARDWARE;

COLOR SPACE CONVERTERS (CSC); MATRIX MULTIPLICATION; MATRIX TRANSFORM; RECONFIGURABLE HARDWARE DEVICES;

IMAGE PROCESSING;

EID: 23744459833     PISSN: 13502409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1049/ip-cds:20040838     Document Type: Conference Paper

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