Performance and power aware CMP thread allocation modeling

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 5952 LNCS, Issue , 2010, Pages 232-246

  Ben Itzhak, Yaniv ^a   Cidon, Israel ^a   Kolodny, Avinoam ^a  

^a TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

Author keywords

Chip multi processor; CMP; Coarse grain multi threading; Many core; Performance power metric; Thread allocation algorithm

Indexed keywords

ALLOCATION ALGORITHM; CHIP-MULTIPROCESSOR; COARSE GRAINS; MANY CORE; MULTI-THREADING;

CONSTRAINED OPTIMIZATION; LEARNING ALGORITHMS; MULTIPROCESSING SYSTEMS; NANOTECHNOLOGY; PROGRAM COMPILERS;

COMPUTATIONAL EFFICIENCY;

EID: 77949675988     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-11515-8_18     Document Type: Conference Paper

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