-
1
-
-
0015680909
-
Logical reversibility of computation
-
Bennett C.H. Logical reversibility of computation. IBM J. Res. Dev 17 (1973) 525-532
-
(1973)
IBM J. Res. Dev
, vol.17
, pp. 525-532
-
-
Bennett, C.H.1
-
2
-
-
0025558645
-
Efficient implementation of a BDD package
-
Brace, K., R. Rudell and R. Bryant, Efficient implementation of a BDD package, in: Design Automation Conf., 1990, pp. 40-45
-
(1990)
Design Automation Conf
, pp. 40-45
-
-
Brace, K.1
Rudell, R.2
Bryant, R.3
-
3
-
-
0022769976
-
Graph-based algorithms for Boolean function manipulation
-
Bryant R. Graph-based algorithms for Boolean function manipulation. IEEE Trans. on Comp. 35 (1986) 677-691
-
(1986)
IEEE Trans. on Comp.
, vol.35
, pp. 677-691
-
-
Bryant, R.1
-
4
-
-
84975654609
-
Reversible optical computing circuits
-
Cuykendall R., and Andersen D.R. Reversible optical computing circuits. Optics Letters 12 (1987) 542-544
-
(1987)
Optics Letters
, vol.12
, pp. 542-544
-
-
Cuykendall, R.1
Andersen, D.R.2
-
6
-
-
33750588847
-
An algorithm for synthesis of reversible logic circuits
-
Gupta P., Agrawal A., and Jha N. An algorithm for synthesis of reversible logic circuits. IEEE Trans. on CAD 25 (2006) 2317-2330
-
(2006)
IEEE Trans. on CAD
, vol.25
, pp. 2317-2330
-
-
Gupta, P.1
Agrawal, A.2
Jha, N.3
-
7
-
-
33748112109
-
Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis
-
Hung W., Song X., Yang G., Yang J., and Perkowski M. Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis. IEEE Trans. on CAD 25 (2006) 1652-1663
-
(2006)
IEEE Trans. on CAD
, vol.25
, pp. 1652-1663
-
-
Hung, W.1
Song, X.2
Yang, G.3
Yang, J.4
Perkowski, M.5
-
8
-
-
0012720416
-
An efficient method for optimal BDD ordering computation
-
Jeong, S.-W., T.-S. Kim and F. Somenzi, An efficient method for optimal BDD ordering computation, in: International Conference on VLSI and CAD, 1993, pp. 252-256
-
(1993)
International Conference on VLSI and CAD
, pp. 252-256
-
-
Jeong, S.-W.1
Kim, T.-S.2
Somenzi, F.3
-
9
-
-
4444239912
-
A new heuristic algorithm for reversible logic synthesis
-
Kerntopf, P., A new heuristic algorithm for reversible logic synthesis, in: Design Automation Conf., 2004, pp. 834-837
-
(2004)
Design Automation Conf
, pp. 834-837
-
-
Kerntopf, P.1
-
10
-
-
0000328287
-
Irreversibility and heat generation in the computing process
-
Landauer R. Irreversibility and heat generation in the computing process. IBM J. Res. Dev. 5 (1961) 183
-
(1961)
IBM J. Res. Dev.
, vol.5
, pp. 183
-
-
Landauer, R.1
-
13
-
-
0027168191
-
Reversible electronic logic using switches
-
Merkle R.C. Reversible electronic logic using switches. Nanotechnology 4 (1993) 21-40
-
(1993)
Nanotechnology
, vol.4
, pp. 21-40
-
-
Merkle, R.C.1
-
14
-
-
0043136670
-
A transformation based algorithm for reversible logic synthesis
-
Miller, D. M., D. Maslov and G. W. Dueck, A transformation based algorithm for reversible logic synthesis, in: Design Automation Conf., 2003, pp. 318-323
-
(2003)
Design Automation Conf
, pp. 318-323
-
-
Miller, D.M.1
Maslov, D.2
Dueck, G.W.3
-
16
-
-
25544459735
-
Reversible logic and quantum computers
-
Peres A. Reversible logic and quantum computers. Phys. Rev. A (1985) 3266-3276
-
(1985)
Phys. Rev. A
, pp. 3266-3276
-
-
Peres, A.1
-
17
-
-
0027841555
-
Dynamic variable ordering for ordered binary decision diagrams
-
Rudell, R., Dynamic variable ordering for ordered binary decision diagrams, in: Int'l Conf. on CAD, 1993, pp. 42-47
-
(1993)
Int'l Conf. on CAD
, pp. 42-47
-
-
Rudell, R.1
-
20
-
-
84978092325
-
Reversible computing
-
de Bakker W., and van Leeuwen J. (Eds), Springer
-
Toffoli T. Reversible computing. In: de Bakker W., and van Leeuwen J. (Eds). Automata, Languages and Programming (1980), Springer 632
-
(1980)
Automata, Languages and Programming
, pp. 632
-
-
Toffoli, T.1
-
21
-
-
70350712413
-
BDD-based synthesis of reversible logic for large functions
-
Wille, R. and R. Drechsler, BDD-based synthesis of reversible logic for large functions, in: Design Automation Conf., 2009
-
(2009)
Design Automation Conf
-
-
Wille, R.1
Drechsler, R.2
-
22
-
-
50449097451
-
-
Wille, R., D. Große, L. Teuber, G. W. Dueck and R. Drechsler, RevLib: An online resource for reversible functions and reversible circuits, in: Int'l Symp. on Multi-Valued Logic, 2008, pp. 220-225, RevLib is available at http://www.revlib.org
-
Wille, R., D. Große, L. Teuber, G. W. Dueck and R. Drechsler, RevLib: An online resource for reversible functions and reversible circuits, in: Int'l Symp. on Multi-Valued Logic, 2008, pp. 220-225, RevLib is available at http://www.revlib.org
-
-
-
-
23
-
-
49749148011
-
Quantified synthesis of reversible logic
-
Wille, R., H. M. Le, G. W. Dueck and D. Große, Quantified synthesis of reversible logic, in: Design, Automation and Test in Europe, 2008, pp. 1015-1020
-
(2008)
Design, Automation and Test in Europe
, pp. 1015-1020
-
-
Wille, R.1
Le, H.M.2
Dueck, G.W.3
Große, D.4
|