Multi-functional interconnect co-optimization for fast and reliable 3D Stacked ICs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2009, Pages 645-651

  Lee, Young Joon ^a   Goel, Rohan ^a   Lim, Sung Kyu ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

3D stacked IC; Design of experiments; Micro fluidic channel; Through silicon via

Indexed keywords

COMPUTER AIDED DESIGN; DESIGN OF EXPERIMENTS; ELECTRIC NETWORK ANALYSIS; ELECTRIC POWER TRANSMISSION; ELECTRONICS PACKAGING; FLUIDIC DEVICES; INTEGRATED CIRCUIT INTERCONNECTS; TIMING CIRCUITS;

3-D STACKED IC; IMPROVE PERFORMANCE; MICROFLUIDIC CHANNEL; POWER DISTRIBUTION NETWORK; POWER-SUPPLY NOISE; RESPONSE SURFACE METHOD; THROUGH SILICON VIAS; THROUGH-SILICON-VIA;

THREE DIMENSIONAL INTEGRATED CIRCUITS;

EID: 76349097994     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1687399.1687519     Document Type: Conference Paper

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