MOLES: Malicious off-chip leakage enabled by side-channels

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2009, Pages 117-122

  Lin, Lang ^a   Burleson, Wayne ^a   Paar, Christof ^a,b  

^a University of Massachusetts   (United States)

^b RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED ENCRYPTION STANDARD; CMOS TECHNOLOGY; DESIGN SPACES; DESIGN VERIFICATION; ECONOMIC INCENTIVE; IP PROTECTION; MULTI-BITS; NOISE POWER; NOVEL TECHNIQUES; OFF-CHIP; ON CHIPS; POTENTIAL THREATS; SECRET INFORMATION; SEMICONDUCTOR INDUSTRY; SPREAD-SPECTRUM TECHNIQUES; STATISTICAL CORRELATION; TROJANS;

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; CRYPTOGRAPHY; ELECTRIC NETWORK ANALYSIS; EMBEDDED SYSTEMS; SEMICONDUCTOR DEVICE MANUFACTURE;

COMPUTER HARDWARE;

EID: 76349087818     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (26)

1. High Performance Microchip Supply, annul report by Defense Science Board, http://www.acq.osd.mil/dsb/, 2005.
2. S. Adee: The hunt for the kill switch. In: IEEE Spectrum, Vol. 45, Issue 5, pp. 34-39, 2008.
3. X. Wang , M. Tehranipoor , J. Plusquellic: Detecting Malicious Inclusions in Secure Hardware: Challenges and Solutions. In: 1st IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), pp. 15-19, 2008.
4. S. T. King, J. Tucek, A. Cozzie, C. Grier, W. Jiang, Y. Zhou: Designing and implementing malicious hardware. In: Proceedings of the 1st USENIX Workshop on Large-Scale Exploits and Emergent Threats (LEET), pp. 1-8, 2008.
5. J. M. Soden, R. E. Anderson, C. L. Henderson: IC Failure Analysis: Magic, Mystery, and Science. In: IEEE Design & Test of Computers, Vol. 14, pp. 59-69, 1997.
6. M. Banga, M. S. Hsiao: A Region Based Approach for the Identification of Hardware Trojans. In: IEEE HOST, pp. 40-47, 2008.
7. R. Chakraborty, S. Paul, S. Bhunia: On-Demand Transparency for Improving Hardware Trojan Detectability. In: IEEE HOST, pp. 48-50, 2008.
8. Y. Jin, N. Kupp, Y. Makris: Experiences in hardware Trojan design and implementation. In: IEEE HOST, pp. 50-57, 2009.
9. P. Kocher, J. Jaffe, B. Jun: Differential Power Analysis. In: Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology (CRYPTO), LNCS 1666, pp. 388-397, 1999.
10. P. Kocher: Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems. In: CRYPTO, pp. 104-113, 1996.
11. A. Shamir, E. Tromer: Acoustic cryptanalysis. http://people.csail.mit. edu/tromer/acoustic/
12. M. Hutter, S. Mangard, M. Feldhofer: Power and EM attacks on passive 13.56 MHz RFID devices, In: Workshop on Cryptographic Hardware and Embedded Systems (CHES), pp. 320-333, 2007.
13. L. Lin, W. Burleson: Analysis and mitigation of process variation impacts on power-attack tolerance, In: Proceedings of ACM/IEEE Design Automation Conference (DAC), pp. 238-243, 2009.
14. K. Tiri, I. Verbauwhede: A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation. In: Design, Automation and Test in Europe (DATE), pp. 246-251, 2004.
15. J. Ambrose, S. Parameswaran, A. Ignjatovic: MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm. In: ACM/IEEE ICCAD, pp. 678-684, 2008.
16. D. Agrawal, S. Baktir, D. Karakoyunlu, P. Rohatgi, B. Sunar: Trojan Detection using IC Fingerprinting. In: IEEE Symposium on Security and Privacy, pp. 296-310, 2007.
17. R. M. Rad, X. Wang, M. Tehranipoor, J. Plusquellic: Power supply signal calibration techniques for improving detection resolution to hardware Trojans. In: ACM/IEEE ICCAD, pp. 632-639, 2008.
18. Y. Jin, Y. Makris: Hardware Trojan Detection Using Path Delay Fingerprint. In: IEEE HOST, pp. 51-57, 2008.
19. L. Lin, M. Kasper, T. Güneysu, C. Paar, W. Burleson: Trojan sidechannels: lightweight hardware Trojans through side-channel engineering. In: CHES, LNCS 5747, pp. 382-395, 2009.
20. Y. Alkabani, F. Koushanfar: Extended Abstract: Designer's Hardware Trojan Horse, In: IEEE HOST, pp. 82-83, 2008.
21. G. Suh, S. Devadas: Physical Unclonable Functions for Device Authentication and Secret Key Generation, In: ACM/IEEE DAC, pp. 9-14, 2007.
22. D. Holcomb, W. Burleson, K. Fu: Initial SRAM state as a fingerprint and source of true random numbers for RFID tags, In: Proceedings of the Conference on RFID Security, 2007.
23. J. Proakis: Digital communications, 4th edition, McGraw-Hill, 2000.
24. S. Chari, J. R. Rao, P. Rohatgi: Template attacks, In: CHES, LNCS 2523, pp. 12-28, 2002.
25. Predictive Technology Model (PTM), http://www.eas.asu.edu/~ptm/
26. J. Rajski, J. Tyszer: Primitive polynomials over GF(2) of degree up to 660 with uniformly distributed coefficients. In: Journal of Electronic Testing: theory and applications, pp. 645-657, 2003.