On-demand transparency for improving hardware Trojan detectability

2008 IEEE International Workshop on Hardware-Oriented Security and Trust, HOST

Volumn , Issue , 2008, Pages 48-50

  Chakraborty, Rajat Subhra ^a   Paul, Somnath ^a   Bhunia, Swarup ^a  

^a Case Western Reserve University   (United States)

Author keywords

Design obfuscation; Hardware Trojan detection; Trust in IC

Indexed keywords

REDUCED INSTRUCTION SET COMPUTING;

DELAY OVERHEADS; DESIGN METHODOLOGIES; DESIGN OBFUSCATION; DETECTABILITY; DETECTION PROBABILITIES; HARDWARE TROJAN DETECTION; JPEG ENCODERS; LOGIC TESTING; MANUFACTURING TESTING; ON-DEMAND; RISC PROCESSOR; TRUST IN IC; VERIFICATION POINTS;

OPTICAL DESIGN;

EID: 51849089785     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HST.2008.4559048     Document Type: Conference Paper

References (6)

1. DARPA BAA06-40, "Trust for Integrated Circuits", http://www.darpa.mil/BAA/
2. P. Kocher, J. Jaffe and B. Jun, "Introduction to Differential Power Analysis and Related Attacks", available online at www.cryptography.com/ resources/whitepapers/DPATechInfo.pdf
3. D. Agrawal et al, "Trojan Detection using IC Fingerprinting", IEEE Symposium on Security and Privacy, 2007.
4. J. Clayton, "The risc16f84: an 8-bit CPU," [Online]. Available: http://www.opencores.org/projects.cgi/web/risc16f84
5. S. Mitra, and K.S. Kim, "X-Compact: An Efficient Response Compaction Technique," IEEE Tran. on CAD, vol. 23, no. 3, pp. 421-432, Mar. 2004.
6. "The JPEG Encoder Soft Core," [Online]. Available: http://www.opencores.org/projects.cgi/web/jpeg/