Impact of Epi-Si growth temperature on Ge-pFET performance

ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference

Volumn , Issue , 2009, Pages 411-414

  Mitard, J ^a,b   Martens, K ^a   DeJaeger, B ^a   Franco, J ^a,b   Shea, C ^c   Plourde, C ^c   Leys, F E ^a   Loo, R ^a   Hellings, G ^a,b,g   Eneman, G ^a,b,f   Wang, Wei E ^d   Lin, J C ^e   Kaczer, B ^a   DeMeyer, K ^a   Hoffmann, T ^a   DeGendt, S ^a   Caymax, M ^a   Meuris, M ^a   Heyns, M M ^a,b  

^a Imec   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c ROCHESTER INSTITUTE OF TECHNOLOGY   (United States)

^d Intel c o IMEC   (Belgium)

^e TSMC c/o IMEC   (Belgium)

^f RESEARCH FOUNDATION FLANDERS FWO   (Belgium)

^g IWT ^*  (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGED DEFECTS; EPITAXIAL SILICON; SILICON GROWTH;

GERMANIUM; GROWTH TEMPERATURE; SILICON;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 72849118850     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2009.5331351     Document Type: Conference Paper

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