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Volumn , Issue , 2009, Pages 464-467

A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior

Author keywords

[No Author keywords available]

Indexed keywords

45NM TECHNOLOGY; AD CONVERTERS; CMOS PROCESSS; CMOS TECHNOLOGY; DEVICE PROPERTIES; FLASH-ADC; FULL NYQUIST; FULL OPTIMIZATION; NYQUIST; POWER EFFICIENT; SCALING ANALYSIS; SCALING BEHAVIOR;

EID: 72849110692     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2009.5326002     Document Type: Conference Paper
Times cited : (8)

References (10)
  • 2
    • 51949115762 scopus 로고    scopus 로고
    • A low power 6-bit flash ADC with reference voltage and common-mode calibration
    • L.M. Chun Ying Chen and K. Kwang Young, "A low power 6-bit flash ADC with reference voltage and common-mode calibration", IEEE Symp. on VLSI Circuits, 2008, pp.12-13
    • (2008) IEEE Symp. on VLSI Circuits , pp. 12-13
    • Chun, L.M.1    Chen, Y.2    Kwang Young, K.3
  • 3
    • 0036917305 scopus 로고    scopus 로고
    • A 6-b 1.6-Gsample/s flash ADC in 0.18-um CMOS using averaging termination
    • Dec
    • P.C.S. Scholtens and M. Vertregt, "A 6-b 1.6-Gsample/s flash ADC in 0.18-um CMOS using averaging termination", IEEE JSSC, vol.37, no.12, pp. 1599-1609, Dec 2002
    • (2002) IEEE JSSC , vol.37 , Issue.12 , pp. 1599-1609
    • Scholtens, P.C.S.1    Vertregt, M.2
  • 4
    • 34548852188 scopus 로고    scopus 로고
    • A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time
    • D.Schinkel, E.Mensink, E.Klumperink, E. van Tuijl and B.Nauta, "A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time", Proc ISSCC, pp. 314-605, 2007.
    • (2007) Proc ISSCC , pp. 314-605
    • Schinkel, D.1    Mensink, E.2    Klumperink, E.3    van Tuijl, E.4    Nauta, B.5
  • 5
    • 72849142599 scopus 로고    scopus 로고
    • MOS model MM11 [Online] Available
    • MOS model MM11" [Online] Available: http://www.nxp.com/models/ mosmodels/mode111/index.html
  • 6
    • 72849145195 scopus 로고    scopus 로고
    • MOS model PSP [Online] Available
    • MOS model PSP" [Online] Available: http://www.nxp.com/models/mos- models/psp/index.html
  • 7
    • 17644388863 scopus 로고    scopus 로고
    • Assessment of the merits of CMOS technology scaling for analog circuit design
    • 21-23 Sept
    • M. Vertregt and P.C.S. Scholtens, "Assessment of the merits of CMOS technology scaling for analog circuit design", Proc. ESSCIRC, 2004, pp. 57-63, 21-23 Sept. 2004
    • (2004) Proc. ESSCIRC, 2004 , pp. 57-63
    • Vertregt, M.1    Scholtens, P.C.S.2
  • 8
    • 28444472480 scopus 로고    scopus 로고
    • P.C.S. Scholtens D. Smola, and M. Vertregt, Systematic power reduction and performance analysis of mismatch limited ADC designs, ISLPED '05, pp.78-83
    • P.C.S. Scholtens D. Smola, and M. Vertregt, "Systematic power reduction and performance analysis of mismatch limited ADC designs", ISLPED '05, pp.78-83


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.