Assessment of the merits of CMOS technology scaling for analog circuit design

ESSCIRC 2004 - Proceedings of the 30th European Solid-State Circuits Conference

Volumn , Issue , 2004, Pages 57-63

  Vertregt, Maarten ^a   Scholtens, Peter C S ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; APPROXIMATION THEORY; BOUNDARY CONDITIONS; CAPACITANCE; COMPUTER SIMULATION; DIGITAL CIRCUITS; ELECTRIC CURRENTS; LOGIC DESIGN; MOS DEVICES;

ANALOG CIRCUIT DESIGNS; CIRCUIT SIMULATION; MULTIPLE GATE OXIDES; NODES;

CMOS INTEGRATED CIRCUITS;

EID: 17644388863     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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