A dataflow-centric approach to design low power control paths in CGRAs

2009 IEEE 7th Symposium on Application Specific Processors, SASP 2009

Volumn , Issue , 2009, Pages 15-20

  Park, Hyunchul ^a   Park, Yongjun ^a   Mahlke, Scott ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COARSE GRAINED RECONFIGURABLE ARCHITECTURE; CONTROL PATH; DATAFLOW; DATAFLOW MACHINES; HARDWARE PLATFORM; INSTRUCTION MEMORIES; LOW COSTS; LOW POWER; POWER CONSUMPTION; TOKEN NETWORKS;

ENERGY EFFICIENCY;

EID: 70350746334     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SASP.2009.5226330     Document Type: Conference Paper

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