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Volumn 1685 LNCS, Issue , 1999, Pages 727-734

The MorphoSys parallel reconfigurable system

Author keywords

[No Author keywords available]

Indexed keywords

PARALLEL PROCESSING SYSTEMS; SYSTEM-ON-CHIP;

EID: 84878663553     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48311-x_102     Document Type: Conference Paper
Times cited : (45)

References (8)
  • 2
    • 0017538003 scopus 로고    scopus 로고
    • A fast computational algorithm for the discrete cosine transform
    • Sept.
    • W-H Chen, C. H. Smith, S. C. Fralick, A Fast Computational Algorithm for the Discrete Cosine Transform, IEEE Trans. on Communications, Vol. 25, No. 9, Sept. 1997, pp. 1004-1009.
    • (1997) IEEE Trans. on Communications , vol.25 , Issue.9 , pp. 1004-1009
    • Chen, W.-H.1    Smith, C.H.2    Fralick, S.C.3
  • 5
    • 0032027434 scopus 로고    scopus 로고
    • V830R/AV: Embedded multimedia superscalar RISC processor
    • T. Arai et al., V830R/AV: Embedded Multimedia Superscalar RISC Processor, IEEE Micro, Mar./Apr. 1998, pp. 36-47. (Pubitemid 128580447)
    • (1998) IEEE Micro , vol.18 , Issue.2 , pp. 36-47
    • Suzuki, K.1    Arai, T.2    Nadehara, K.3    Kuroda, I.4
  • 6
    • 84878642318 scopus 로고    scopus 로고
    • Implementing an MPEG2 video decoder based on TMS320C80 MVP
    • Texas Instruments, Sept.
    • F. Bonimini et al., Implementing an MPEG2 Video Decoder Based on TMS320C80 MVP, SPRA 332, Texas Instruments, Sept. 1996.
    • (1996) SPRA 332
    • Bonimini, F.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.