-
1
-
-
0034848112
-
Route packets not wires: On-chip interconnection networks
-
June 2001
-
Dally, W., Towles, B.: Route Packets, Not Wires: On-Chip Interconnection Networks. In: DAC, June 2001, pp. 684-689 (2001)
-
(2001)
DAC
, pp. 684-689
-
-
Dally, W.1
Towles, B.2
-
2
-
-
0036149420
-
Networks on chip: A new SoC paradigm
-
Benini, L., De Micheli, G.: Networks on Chip: A new SoC Paradigm. IEEE Computer 35, 70-78 (2002)
-
(2002)
IEEE Computer
, vol.35
, pp. 70-78
-
-
Benini, L.1
De Micheli, G.2
-
3
-
-
70349969590
-
Communication performance in network-on-chips
-
November 25
-
Jantsch, A.: Communication Performance in Network-on-Chips. Network on Chip Seminar Linkping, November 25 (2005)
-
(2005)
Network on Chip Seminar Linkping
-
-
Jantsch, A.1
-
4
-
-
21244446655
-
On improving best effort throughput by better utilization of guaranteed-throughput channels in an on-chip communication system
-
November 8-9
-
Andreasson, D., Kumar, S.: On improving Best Effort throughput by better utilization of Guaranteed-Throughput channels in an on-chip communication system. In: Proceedings of Norchip conference, November 8-9, pp. 265-268 (2004)
-
(2004)
Proceedings of Norchip Conference
, pp. 265-268
-
-
Andreasson, D.1
Kumar, S.2
-
5
-
-
70349966022
-
QNoC Asynchronous Router
-
Rostilav, D., Ginosar, R., Kolodny, A.: QNoC Asynchronous Router. Integration VLSI Journal 814, 1-13 (2008)
-
(2008)
Integration VLSI Journal
, vol.814
, pp. 1-13
-
-
Rostilav, D.1
Ginosar, R.2
Kolodny, A.3
-
6
-
-
77951163542
-
NIRGAM: A simulator for NoC interconnect routing and application modeling
-
France, April 16-20
-
Jain, L., Al-Hasimi, B.M., Gaur, M.S., Laxmi, V., Narayanan, A.: NIRGAM: A Simulator for NoC Interconnect Routing and Application Modeling. In: Design, Automation and test in Europe 2007 (DATE 2007), Nice, France, April 16-20 (2007)
-
(2007)
Design, Automation and Test in Europe 2007 (DATE 2007), Nice
-
-
Jain, L.1
Al-Hasimi, B.M.2
Gaur, M.S.3
Laxmi, V.4
Narayanan, A.5
-
8
-
-
33847180506
-
Improving BE traffic QoS using GT slack in NoC systems
-
November 21-22
-
Andreasson, D., Kumar, S.: Improving BE Traffic QoS using GT slack in NoC Systems. In: NORCHIP Conference, November 21-22, pp. 44-47 (2005)
-
(2005)
NORCHIP Conference
, pp. 44-47
-
-
Andreasson, D.1
Kumar, S.2
-
9
-
-
1242309790
-
QNoC: QoS architecture and design process for network on chip
-
Bolotin, E., Cidon, I., Ginosar, R., Kolodny, A.: QNoC: QoS Architecture and design process for network on chip. Journal of Systems Architecture, 105-128 (2004)
-
(2004)
Journal of Systems Architecture
, pp. 105-128
-
-
Bolotin, E.1
Cidon, I.2
Ginosar, R.3
Kolodny, A.4
-
10
-
-
1242309793
-
Packetization and routing analysis of onchip multiprocessor networks
-
February
-
Ye, T.T., Benini, L., De Micheli, G.: Packetization and routing analysis of onchip multiprocessor networks. Journal of Systems Architecture 50(2-3) (February 2004)
-
(2004)
Journal of Systems Architecture
, vol.50
, Issue.2-3
-
-
Ye, T.T.1
Benini, L.2
De Micheli, G.3
-
12
-
-
33746318155
-
Packet Routing in Dynamically Changing Networks on Chip
-
Denver, CA, USA, April 4-8
-
Majer, M., Bobda, C., Ahmadinia, A., Teich, J.: Packet Routing in Dynamically Changing Networks on Chip. In: Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2005), Denver, CA, USA, April 4-8, pp. 154b-154b (2005)
-
(2005)
Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2005)
-
-
Majer, M.1
Bobda, C.2
Ahmadinia, A.3
Teich, J.4
-
13
-
-
0032295838
-
FPGA-Based Internet Protocol Version 6 Router
-
Austin, Texas, USA, October 2-5
-
Mansour, M., Kayssi, A.: FPGA-Based Internet Protocol Version 6 Router. In: Proceedings of International Conference on Computer Design: VLSI in Computers and Processors (ICCD 1998), Austin, Texas, USA, October 2-5, pp. 334-339 (1998)
-
(1998)
Proceedings of International Conference on Computer Design: VLSI in Computers and Processors (ICCD 1998)
, pp. 334-339
-
-
Mansour, M.1
Kayssi, A.2
-
14
-
-
33745794830
-
Design of a switching node (Router) for on- chip networks
-
Beijing, China, October 21-24
-
Sathe, S., Wiklund, D., Liu, D.: Design of a Switching Node (Router) for On- Chip Networks. In: 5th International Conference on ASIC Proceedings (ASICCON 2003), Beijing, China, October 21-24, vol.1, pp. 75-78 (2003)
-
(2003)
5th International Conference on ASIC Proceedings (ASICCon 2003)
, vol.1
, pp. 75-78
-
-
Sathe, S.1
Wiklund, D.2
Liu, D.3
-
15
-
-
34347259951
-
A united approach to mapping and routing on a network-on-chip for both best-effort and guaranteed service traffic
-
Hansson, A., Goossens, K., Radulescu, A.: A United Approach to Mapping and Routing on a Network-on-Chip for both Best-Effort and Guaranteed Service Traffic. VLSI Design, vol.2007 (2007)
-
(2007)
VLSI Design
, vol.2007
-
-
Hansson, A.1
Goossens, K.2
Radulescu, A.3
|