A-ports: An efficient abstraction for cycle-accurate performance models on FPGAs

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2008, Pages 87-96

  Pellauer, Michael ^a   Vijayaraghavan, Muralidaran ^a   Adler, Michael ^b   Arvind, ^a   Emer, Joel ^a,b  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

Emulation; FPGA; Performance models; Prototyping; Simulation

Indexed keywords

EMULATION; FPGA; PERFORMANCE MODELS; PROTOTYPING; SIMULATION;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC GATES;

SIMULATORS;

EID: 70349321124     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1344671.1344685     Document Type: Conference Paper

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