In-system FPGA prototyping of an itanium microarchitecture

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2004, Pages 288-294

  Wunderlich, Roland E ^a   Hoe, James C ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE HIERARCHIES; FUNCTIONAL PROGRAMMING; ITANIUM MICROARCHITECTURE; MICROPROCESSOR PROTOTYPING;

CACHE MEMORY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; FIELD PROGRAMMABLE GATE ARRAYS; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS; SEMANTICS;

SOFTWARE PROTOTYPING;

EID: 17644408112     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2004.1347935     Document Type: Conference Paper

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