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Volumn , Issue , 2009, Pages 23-31

A programmable adaptive router for a GALS parallel system

Author keywords

[No Author keywords available]

Indexed keywords

FAULT TOLERANCE; NETWORK ARCHITECTURE; ROUTERS;

EID: 70349295608     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.2009.17     Document Type: Conference Paper
Times cited : (13)

References (13)
  • 4
    • 34047142195 scopus 로고    scopus 로고
    • Neural systems engineering
    • The Royal Society, England
    • S. B. Furber and S. Temple, Neural Systems Engineering, Journal of The Royal Society Interface, The Royal Society, England, Vol.4, No.13, pp. 193-206, 2007.
    • (2007) Journal of The Royal Society Interface , vol.4 , Issue.13 , pp. 193-206
    • Furber, S.B.1    Temple, S.2
  • 6
    • 0042111484 scopus 로고    scopus 로고
    • A. Jantsch and H. Tenhunen (Eds.), Kluwer Academic Publishers, Hingham, MA
    • A. Jantsch and H. Tenhunen (Eds.), Networks on Chip, Kluwer Academic Publishers, Hingham, MA, 2003.
    • (2003) Networks on Chip
  • 8
    • 0036149420 scopus 로고    scopus 로고
    • Networks on chip: A new SoC paradigm
    • IEEE Computer Society
    • L. Benini and G. De Micheli, Networks on Chip: A New SoC Paradigm, IEEE Computer, IEEE Computer Society, Vol.35, No.1, pp. 70-78, 2002.
    • (2002) IEEE Computer , vol.35 , Issue.1 , pp. 70-78
    • Benini, L.1    De Micheli, G.2
  • 10
    • 0036761283 scopus 로고    scopus 로고
    • Chain: A delay-insensitive chip area interconnect
    • J. Bainbridge and S. B. Furber, Chain: A Delay-Insensitive Chip Area Interconnect, IEEE Micro, Vol.24, Np. 5, pp. 16-23, 2002.
    • (2002) IEEE Micro , vol.24 , Issue.5 , pp. 16-23
    • Bainbridge, J.1    Furber, S.B.2
  • 11
    • 4043150092 scopus 로고    scopus 로고
    • Xpipes: A network-on-chip architecture for gigascale systems-on-chip
    • D. Bertozzi and L. Benini, xpipes: A Network-on-Chip Architecture for Gigascale Systems-on-Chip, IEEE Circuits and Systems Magazine, pp. 1831, 2004.
    • (2004) IEEE Circuits and Systems Magazine , pp. 1831
    • Bertozzi, D.1    Benini, L.2
  • 12
    • 85172434215 scopus 로고    scopus 로고
    • Robust interfaces for mixed- timing systems with application to latency-insensitive protocols
    • ACM
    • T. Chelcea and S. Nowick, Robust Interfaces for Mixed- Timing Systems with Application to Latency-Insensitive Protocols, Proc. of the Design Automation Conf., ACM, pp. 216, 2002.
    • (2002) Proc. of the Design Automation Conf. , pp. 216
    • Chelcea, T.1    Nowick, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.