An edge-missing compensator for fast-settling wide-locking-range PLLs

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2009, Pages 394-396

  Chien, Ting Hsu ^a   Lin, Chi Sheng ^a   Juang, Ying Zong ^a   Huang, Chun Ming ^a   Wey, Chin Long ^a,b  

^a NATIONAL APPLIED RESEARCH LABORATORIES   (Taiwan)

^b NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 70349272860     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2009.4977474     Document Type: Conference Paper

References (6)

1. B. Razavi, Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design, Wiley-IEEE Press, 1996.
2. P.V. Brennan, "Performance of Phase-Locked Loop Frequency Synthesizer Using Accumulative Phase Detector," IEE Proc. Circuits, Devices and Systems, vol.143, no.5, pp.249-254, Oct., 1996.
3. M. Papamichail, D. Karadimas, K. Efstathiou, and G. Papadopoulos, "Linear Range Extension of Phase-Frequency-Dector with Saturated Output," IEEE International Symp. Circuits and Systems, pp. 1671-1674, May, 2006.
4. M. Keaveney, P. Walsh, M. Tuthill, et al., "A 10us Fast Switching PLL Synthesizer for a GSM/EDGE Base-Station," ISSCC Dig. Tech. Papers, pp. 192-193, Feb., 2004.
5. X. Kuang and N. Wu, "A Fast-Settling PLL Frequency Synthesizer with Direct Frequency Presetting," ISSCC Dig. Tech. Papers, pp. 741-742, Feb., 2006.
6. C.-Y. Yang and S.-I. Liu, "Fast-Switching Frequency Synthesizer with a Discriminator-Aided Phase Detector," IEEE J Solid-State Circuits, vol.35, no.10, pp.1445-1452, Oct., 2000.