A low-complexity, low-phase-noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 7, 2009, Pages 1942-1949

  Borremans, Jonathan ^a   Ryckaert, Julien ^a   Desset, Claude ^a   Kuijk, Maarten ^b   Wambacq, Piet ^b   Craninckx, Jan ^a  

^a IMEC   (Belgium)

^b VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

Author keywords

Clock multiplier; CMOS; Low voltage; Realignment; Ring oscillator

Indexed keywords

CLOCK MULTIPLIER; CMOS; LOW-VOLTAGE; REALIGNMENT; RING OSCILLATOR;

CLOCKS; ELECTRIC POTENTIAL; FREQUENCY MULTIPLYING CIRCUITS; OPTICAL DEVICES;

OSCILLATORS (ELECTRONIC);

EID: 67651149772     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2020231     Document Type: Article

References (11)

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