A 35-GS/s, 4-Bit Flash ADC With Active Data and Clock Distribution Trees

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 6, 2009, Pages 1709-1720

  Shahramian, Shahriar ^a   Voinigescu, Sorin P ^a   Carusone, Anthony Chan ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

Active clock distribution; Active data distribution; Analog to digital converter (ADC); BiCMOS amplifiers; Digital to analog converter (DAC); DSP based equalizers; Flash data converters; Mm wave data converters; SiGe BiCMOS HBT; Track and hold amplifier (THA); Transimpedance amplifier (TIA)

Indexed keywords

ACTIVE CLOCK DISTRIBUTION; ACTIVE DATA DISTRIBUTION; ANALOG TO DIGITAL CONVERTER (ADC); BICMOS AMPLIFIERS; DIGITAL TO ANALOG CONVERTER (DAC); DSP-BASED EQUALIZERS; FLASH DATA CONVERTERS; MM-WAVE DATA CONVERTERS; SIGE BICMOS HBT; TRACK AND HOLD AMPLIFIER (THA); TRANSIMPEDANCE AMPLIFIER (TIA);

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; COMPARATORS (OPTICAL); DIFFERENTIAL AMPLIFIERS; DIGITAL INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSORS; DIGITAL TO ANALOG CONVERSION; ELECTRIC CLOCKS; FREQUENCY CONVERTERS; MILLIMETER WAVES; MULTICARRIER MODULATION; SEMICONDUCTING GERMANIUM COMPOUNDS; SEMICONDUCTING SILICON; SILICON ALLOYS;

BICMOS TECHNOLOGY;

EID: 67649655768     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2020657     Document Type: Article

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