Limits to performance spread tuning using adaptive voltage and body biasing

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 5-8

  Meijer, Maurice ^a   Pessolano, Francesco ^b   De Gyvez, José Pineda ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE POWER; ADAPTIVE BODY BIASING; ADAPTIVE VOLTAGE; ADAPTIVE VOLTAGE SCALING; BODY BIASING; CMOS TECHNOLOGY; DESIGN TECHNIQUE; DOWN-SCALING; FREQUENCY-TUNING; LOW POWER; MEASUREMENT RESULTS; POWER SAVINGS; RING OSCILLATOR; TECHNOLOGY CONSTRAINTS; TEST CIRCUIT; TRIPLE WELL;

CMOS INTEGRATED CIRCUITS; SHIFT REGISTERS;

TUNING;

EID: 67649115008     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1464510     Document Type: Conference Paper

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