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Volumn 44, Issue 5, 2009, Pages 1391-1400

A low jitter programmable clock multiplier based on a pulse injection-locked oscillator with a highly-digital tuning loop

Author keywords

Correlated double sampling; Correlation; Deterministic jitter; Gated ring oscillator; GRO; Injection locked oscillator; Integer N; Phase locked loop; PILO; PLL; Pulse; Reference spur; Subharmonic; TDC; Time to digital converter

Indexed keywords

CORRELATED DOUBLE SAMPLING; CORRELATION; DETERMINISTIC JITTER; GATED RING OSCILLATOR; GRO; INJECTION LOCKED OSCILLATOR; INTEGER-N; PILO; PLL; PULSE; REFERENCE SPUR; SUBHARMONIC; TDC; TIME TO DIGITAL CONVERTER;

EID: 66149115239     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2015816     Document Type: Conference Paper
Times cited : (100)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.