-
3
-
-
33845305109
-
A digitally tuned 1.1 GHz subharmonic injection-locked VCO in 0.18 μm CMOS
-
in, Sep
-
H. Ahmed C. DeVries R. Mason "A digitally tuned 1.1 GHz subharmonic injection-locked VCO in 0.18 μm CMOS", in Proc. ES-SCIRC Sep. 2003, pp. 81-84.
-
(2003)
Proc. ES-SCIRC
, pp. 81-84
-
-
Ahmed, H.1
DeVries, C.2
Mason, R.3
-
4
-
-
0035446424
-
HiperLAN 5.4-GHz low-power CMOS synchronous oscillator
-
Sep
-
Y. Deval J. Begueret A. Spataro P. Fouillat D. Belot F. Badets "HiperLAN 5.4-GHz low-power CMOS synchronous oscillator", IEEE Trans. Microw. Theory Tech. vol. 49, no. 9, pp. 1525-1530 Sep. 2001.
-
(2001)
IEEE Trans. Microw. Theory Tech
, vol.49
, Issue.9
, pp. 1525-1530
-
-
Deval, Y.1
Begueret, J.2
Spataro, A.3
Fouillat, P.4
Belot, D.5
Badets, F.6
-
5
-
-
57849160809
-
UWB fast-hopping frequency generation based on sub-harmonic injection locking
-
Dec
-
S. Dal Toso A. Bevilacqua M. Tiebout S. Marsili C. Sandner A. Gerosa A. Neviani "UWB fast-hopping frequency generation based on sub-harmonic injection locking", IEEE J. Solid-State Circuits vol. 43, no. 12, pp. 2844-2852 Dec. 2008.
-
(2008)
IEEE J. Solid-State Circuits
, vol.43
, Issue.12
, pp. 2844-2852
-
-
Toso, S.D.1
Bevilacqua, A.2
Tiebout, M.3
Marsili, S.4
Sner, C.5
Gerosa, A.6
Neviani, A.7
-
6
-
-
4444227312
-
A study of injection locking and pulling in oscillators
-
Sep
-
B. Razavi "A study of injection locking and pulling in oscillators", IEEE J. Solid-State Circuits vol. 39, no. 9, pp. 1415-1424 Sep. 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.9
, pp. 1415-1424
-
-
Razavi, B.1
-
7
-
-
0033905094
-
Oscillator phase noise: A tutorial
-
DOI 10.1109/4.826814
-
T. H. Lee A. Hajimiri "Oscillator phase noise: A tutorial", IEEE J. Solid-State Circuits vol. 35, no. 3, pp. 326-336 Mar. 2000. (Pubitemid 30588021)
-
(2000)
IEEE Journal of Solid-State Circuits
, vol.35
, Issue.3
, pp. 326-335
-
-
Lee, T.H.1
Hajimiri, A.2
-
8
-
-
51849092233
-
A low noise programmable clock multiplier based on a pulse injection-locked oscillator with a highly-digital tuning loop
-
in, Jun
-
B. Helal C.-M. Hsu K. Johnson M. Perrott "A low noise programmable clock multiplier based on a pulse injection-locked oscillator with a highly-digital tuning loop", in Proc. IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Jun. 2008, pp. 423-426.
-
(2008)
Proc. IEEE Radio Frequency Integrated Circuits (RFIC) Symp
, pp. 423-426
-
-
Helal, B.1
Hsu, C.-M.2
Johnson, K.3
Perrott, M.4
-
9
-
-
41549140087
-
A highly-digital MDLL-based clock multiplier that leverages a self-scrambling time-to-digital converter to achieve sub-picosecond jitter performance
-
Apr
-
B. Helal M. Straayer G. Wei M. Perrott "A highly-digital MDLL-based clock multiplier that leverages a self-scrambling time-to-digital converter to achieve sub-picosecond jitter performance", IEEE J. Solid-State Circuits vol. 43, no. 4, pp. 855-863 Apr. 2008.
-
(2008)
IEEE J. Solid-State Circuits
, vol.43
, Issue.4
, pp. 855-863
-
-
Helal, B.1
Straayer, M.2
Wei, G.3
Perrott, M.4
-
10
-
-
41549162389
-
Techniques for low jitter clock multiplication
-
Ph. D. dissertation, Cambridge, MA, Feb
-
B. Helal "Techniques for low jitter clock multiplication", Ph. D. dissertation Massachusetts Inst. Technol., Cambridge, MA, Feb. 2008.
-
(2008)
Massachusetts Inst. Technol
-
-
Helal, B.1
-
11
-
-
63749086377
-
A multi-path gated ring oscillator TDC with first-order noise shaping
-
Apr
-
M. Straayer M. Perrott "A multi-path gated ring oscillator TDC with first-order noise shaping", IEEE J. Solid-State Circuits vol. 44, no. 4, pp. 1089-1098 Apr. 2009.
-
(2009)
IEEE J. Solid-State Circuits
, vol.44
, Issue.4
, pp. 1089-1098
-
-
Straayer, M.1
Perrott, M.2
-
12
-
-
0034227707
-
A family of low-power truly modular programmable dividers in standard 0.35 μm CMOS technology
-
Jul
-
C. Vaucher I. Ferencic M. Locher S. Sedvallson U. Voegeli Z. Wang "A family of low-power truly modular programmable dividers in standard 0.35 μm CMOS technology", IEEE J. Solid-State Circuits vol. 35, no. 7, pp. 1039-1045 Jul. 2000.
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, Issue.7
, pp. 1039-1045
-
-
Vaucher, C.1
Ferencic, I.2
Locher, M.3
Sedvallson, S.4
Voegeli, U.5
Wang, Z.6
-
13
-
-
0036908386
-
A multiple-crystal interface PLL with VCO realignment to reduce phase noise
-
Dec
-
S. Ye L. Jansson I. Galton "A multiple-crystal interface PLL with VCO realignment to reduce phase noise", IEEE J. Solid-State Circuits vol. 37, no. 12, pp. 1795-1803 Dec. 2002.
-
(2002)
IEEE J. Solid-State Circuits
, vol.37
, Issue.12
, pp. 1795-1803
-
-
Ye, S.1
Jansson, L.2
Galton, I.3
-
15
-
-
84897568709
-
A study of sub-harmonic injection locking for local oscillators
-
Mar
-
X. Zhang X. Zhou B. Aliener A. S. Daryoush "A study of sub-harmonic injection locking for local oscillators", IEEE Microw. Guided Wave Lett. vol. 2, no. 3, pp. 97-99 Mar. 1992.
-
(1992)
IEEE Microw. Guided Wave Lett
, vol.2
, Issue.3
, pp. 97-99
-
-
Zhang, X.1
Zhou, X.2
Aliener, B.3
Daryoush, A.S.4
-
16
-
-
33745501202
-
Synchronization of Ti: Sapphire and Cr:forsterite mode-locked lasers with 100-attosecond precision by optical-phase stabilization
-
D. Yoshitomi Y. Kobayashi M. Kakehata H. Takada K. Torizuka "Synchronization of Ti:Sapphire and Cr:Forsterite mode-locked lasers with 100-attosecond precision by optical-phase stabilization", Opt. Expr. vol. 14, no. 13, pp. 6359-6365 Jun. 2006. (Pubitemid 43959287)
-
(2006)
Optics Express
, vol.14
, Issue.13
, pp. 551-556
-
-
Yoshitomi, D.1
Kobayashi, Y.2
Kakehata, M.3
Takada, H.4
Torizuka, K.5
|