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Volumn , Issue , 2008, Pages 423-426

A low noise programmable clock multiplier based on a pulse injection-locked oscillator with a highly-digital tuning loop

Author keywords

Correlation; Injection locked oscillators; Jitter; Phase locked loops; Time measurement

Indexed keywords

DIGITAL ARITHMETIC; DIGITAL INTEGRATED CIRCUITS; ELECTRONICS INDUSTRY; FREQUENCY MULTIPLYING CIRCUITS; INTEGRATED CIRCUITS; JITTER; NETWORKS (CIRCUITS); PHASE LOCKED LOOPS; RADIO WAVES; TUNING;

EID: 51849092233     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2008.4561468     Document Type: Conference Paper
Times cited : (5)

References (9)
  • 1
    • 34548815374 scopus 로고    scopus 로고
    • A 90GHz 65nm CMOS Injection-Locked Frequency Divider
    • Feb
    • P. Mayr, C. Weyers and U. Langmann, "A 90GHz 65nm CMOS Injection-Locked Frequency Divider," ISSCC Dig. Tech. Papers, pp. 198-596, Feb. 2007.
    • (2007) ISSCC Dig. Tech. Papers , pp. 198-596
    • Mayr, P.1    Weyers, C.2    Langmann, U.3
  • 2
    • 34548831052 scopus 로고    scopus 로고
    • A 20Gb/s Burst-Mode CDR circuit using Injection-Locking technique
    • Feb
    • J. Lee and M. Liu, "A 20Gb/s Burst-Mode CDR circuit using Injection-Locking technique," ISSCC Dig. Tech. Papers, pp. 46-586, Feb. 2007.
    • (2007) ISSCC Dig. Tech. Papers , pp. 46-586
    • Lee, J.1    Liu, M.2
  • 3
    • 33845305109 scopus 로고    scopus 로고
    • A digitally tuned 1.1 GHz subharmonic injection-locked VCO in 0.18um CMOS
    • Sep
    • H. Ahmed, C. DeVries and R. Mason, "A digitally tuned 1.1 GHz subharmonic injection-locked VCO in 0.18um CMOS," in Proc. ESSCIRC, pp. 81- 84, Sep. 2003.
    • (2003) Proc. ESSCIRC , pp. 81-84
    • Ahmed, H.1    DeVries, C.2    Mason, R.3
  • 4
    • 0033685772 scopus 로고    scopus 로고
    • Fully integrated 94-GHz subharmonic injection-locked PLL circuit
    • Feb
    • S. Kudszus, M. Neumann, T. Berceli, and W. Haydl, "Fully integrated 94-GHz subharmonic injection-locked PLL circuit," IEEE Microw. Guided Wave Lett., vol. 10, no. 2, pp. 70-72, Feb. 2000.
    • (2000) IEEE Microw. Guided Wave Lett , vol.10 , Issue.2 , pp. 70-72
    • Kudszus, S.1    Neumann, M.2    Berceli, T.3    Haydl, W.4
  • 5
    • 0036908386 scopus 로고    scopus 로고
    • A multiple-crystal interface PLL with VCO realignment to reduce phase noise
    • Dec
    • S. Ye, L. Jansson, and I. Galton, "A multiple-crystal interface PLL with VCO realignment to reduce phase noise," IEEE J. of Solid-State Circuits, vol. 37, no. 12, pp. 1795-1803, Dec. 2002.
    • (2002) IEEE J. of Solid-State Circuits , vol.37 , Issue.12 , pp. 1795-1803
    • Ye, S.1    Jansson, L.2    Galton, I.3
  • 6
    • 41549140087 scopus 로고    scopus 로고
    • A highly-digital MDLL-based clock multiplier that leverages a self-scrambling time-to-digital converter to achieve subpicosecond jitter performance
    • Apr
    • B. Helal, M. Straayer, G. Wei, and M. Perrott, "A highly-digital MDLL-based clock multiplier that leverages a self-scrambling time-to-digital converter to achieve subpicosecond jitter performance," IEEE J. Solid-State Circuits, vol. 43, no. 4, Apr. 2008.
    • (2008) IEEE J. Solid-State Circuits , vol.43 , Issue.4
    • Helal, B.1    Straayer, M.2    Wei, G.3    Perrott, M.4
  • 7
    • 51949114983 scopus 로고    scopus 로고
    • An efficient high-resolution 11-bit noise-shaping multipath gated ring oscillator TDC
    • Papers, Jun 2008
    • M. Straayer and M. Perrott, "An efficient high-resolution 11-bit noise-shaping multipath gated ring oscillator TDC", in IEEE Symposium on VLSI Circuits Digest of Tech. Papers, Jun 2008.
    • IEEE Symposium on VLSI Circuits Digest of Tech
    • Straayer, M.1    Perrott, M.2
  • 8
    • 84897568709 scopus 로고
    • A study of subharmonic injection locking for local oscillators
    • Mar
    • X. Zhang, X. Zhou, B. Aliener, and A.S. Daryoush, "A study of subharmonic injection locking for local oscillators," IEEE Microw. Guided Wave Lett., vol. 2, no. 3, pp. 97-99, Mar. 1992.
    • (1992) IEEE Microw. Guided Wave Lett , vol.2 , Issue.3 , pp. 97-99
    • Zhang, X.1    Zhou, X.2    Aliener, B.3    Daryoush, A.S.4
  • 9
    • 0034227707 scopus 로고    scopus 로고
    • A family of low-power truly modular programmable dividers in standard 0.35 μm CMOS technology
    • Jul
    • C. Vaucher, I. Ferencic, M. Locher, S. Sedvallson, U. Voegeli, and Z. Wang, "A family of low-power truly modular programmable dividers in standard 0.35 μm CMOS technology," IEEE J. Solid-State Circuits, vol. 35, no. 7, pp. 1039-1045, Jul. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.7 , pp. 1039-1045
    • Vaucher, C.1    Ferencic, I.2    Locher, M.3    Sedvallson, S.4    Voegeli, U.5    Wang, Z.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.