Optimized reversible multiplier circuit

Journal of Circuits, Systems and Computers

Volumn 18, Issue 2, 2009, Pages 311-323

  Haghparast, Majid ^a   Mohammadi, Majid ^b   Navi, Keivan ^b   Eshghi, Mohammad ^b  

^a ISLAMIC AZAD UNIVERSITY   (Iran)

^b SHAHID BEHESHTI UNIVERSITY   (Iran)

Author keywords

Nanotechnology; Quantum computing; Reversible logic circuit; Reversible logic gate; Reversible multiplier

Indexed keywords

COMPLEX SYSTEMS; DNA-COMPUTING; FULL ADDERS; GARBAGE OUTPUTS; HARDWARE COMPLEXITY; LOW-POWER CMOS DESIGNS; MULTIPLIER CIRCUITS; MULTIPLIER DESIGNS; OPTICAL INFORMATION PROCESSING; QUANTUM COMPUTING; QUANTUM COSTS; REVERSIBLE LOGIC CIRCUIT; REVERSIBLE LOGIC GATE; REVERSIBLE MULTIPLIER;

ADDERS; BIOINFORMATICS; FREQUENCY MULTIPLYING CIRCUITS; GENETIC PROGRAMMING; LOGIC DESIGN; LOGIC GATES; NANOTECHNOLOGY; NUCLEIC ACIDS; OPTICAL DATA PROCESSING; QUANTUM COMPUTERS; QUANTUM THEORY; SWITCHING CIRCUITS;

LOGIC CIRCUITS;

EID: 65349109708     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218126609005083     Document Type: Article

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