-
1
-
-
4344701075
-
Successive refinement of video: Fundamental issues, past efforts and new directions
-
D. Taubman, "Successive refinement of video: Fundamental issues, past efforts and new directions," in Proc. Int. Symp. Vis. Commun. Image Process., 2003, pp. 791-805.
-
(2003)
Proc. Int. Symp. Vis. Commun. Image Process
, pp. 791-805
-
-
Taubman, D.1
-
2
-
-
3242747562
-
Advanced motion threading for 3-D wavelet video coding
-
Aug
-
L. Luo et al., "Advanced motion threading for 3-D wavelet video coding," Signal Process.: Image Commun., vol. 19, no. 7, pp. 601-616, Aug. 2004.
-
(2004)
Signal Process.: Image Commun
, vol.19
, Issue.7
, pp. 601-616
-
-
Luo, L.1
-
3
-
-
32544437722
-
-
ISO/IEC JTC1/WG11 Doc. N6716, ISO/IEC JTC1, Oct
-
Scalable Video Model 3.0, ISO/IEC JTC1/WG11 Doc. N6716, ISO/IEC JTC1, Oct. 2004.
-
(2004)
Scalable Video Model 3.0
-
-
-
4
-
-
64149104486
-
-
Joint Scalable Video Model 8.0, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. JVT-U202, ISO/IEC JTC1, Oct. 2006.
-
Joint Scalable Video Model 8.0, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. JVT-U202, ISO/IEC JTC1, Oct. 2006.
-
-
-
-
5
-
-
18144402442
-
MCTF and scalability extension of H.264/AVC
-
presented at the, Dec
-
H. Schwarz, D. Marpe, and T. Wiegand, "MCTF and scalability extension of H.264/AVC," presented at the Picture Coding Symp., Dec. 2004.
-
(2004)
Picture Coding Symp
-
-
Schwarz, H.1
Marpe, D.2
Wiegand, T.3
-
6
-
-
33749410370
-
System analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering
-
Oct
-
C.-Y. Chen, C.-T. Huang, Y.-H. Chen, S.-Y. Chien, and L.-G. Chen, "System analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering," IEEE Trans. Signal Process., vol. 54, no. 10, pp. 4004-4014, Oct. 2006.
-
(2006)
IEEE Trans. Signal Process
, vol.54
, Issue.10
, pp. 4004-4014
-
-
Chen, C.-Y.1
Huang, C.-T.2
Chen, Y.-H.3
Chien, S.-Y.4
Chen, L.-G.5
-
7
-
-
0034428239
-
A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM
-
T. Nishikawa et al., "A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM," in Proc. IEEE Int. Solid-State Circuits Conference, 2000, pp. 230-231.
-
(2000)
Proc. IEEE Int. Solid-State Circuits Conference
, pp. 230-231
-
-
Nishikawa, T.1
-
8
-
-
0036216763
-
On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture
-
Jan
-
J.-C. Tuan, T.-S. Chang, and C.-W. Jen, "On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture," IEEE Trans. Circuits Syst. Video Technol., vol. 12, no. 1, pp. 61-72, Jan. 2002.
-
(2002)
IEEE Trans. Circuits Syst. Video Technol
, vol.12
, Issue.1
, pp. 61-72
-
-
Tuan, J.-C.1
Chang, T.-S.2
Jen, C.-W.3
-
9
-
-
64149093556
-
-
Comparison of MCTF and Closed-Loop Hierarchical b Pictures, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. JVT-P059, ISO/IEC JTC1, Jul. 2005.
-
Comparison of MCTF and Closed-Loop Hierarchical b Pictures, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. JVT-P059, ISO/IEC JTC1, Jul. 2005.
-
-
-
-
10
-
-
33646424425
-
Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering
-
C.-T. Huang, C.-Y. Chen, Y.-H. Chen, and L.-G. Chen, "Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering," in Proc. IEEE Int. Conf. Acoustics, Speech, Signal Process., 2005, pp. V-93-V-96.
-
(2005)
Proc. IEEE Int. Conf. Acoustics, Speech, Signal Process
-
-
Huang, C.-T.1
Chen, C.-Y.2
Chen, Y.-H.3
Chen, L.-G.4
-
11
-
-
34247558110
-
Analysis of hierarchical B pictures and MCTF
-
H. Schwarz, D. Marpe, and T. Wiegand, "Analysis of hierarchical B pictures and MCTF," in Proc. IEEE Int. Conf. Multimedia Expo, 2006, pp. 1929-1932.
-
(2006)
Proc. IEEE Int. Conf. Multimedia Expo
, pp. 1929-1932
-
-
Schwarz, H.1
Marpe, D.2
Wiegand, T.3
-
12
-
-
28144447102
-
A 1.3 tops H.264/AVC single-chip encoder for HDTV applications
-
Y.-W. Huang, T.-C. Chen, C.-H. Tsai, C.-Y. Chen, T.-W. Chen, C.-S. Chen, C.-F. Shen, S.-Y. Ma, T.-C.Wang, B.-Y. Hsieh, H.-C. Fang, and L.-G. Chen, "A 1.3 tops H.264/AVC single-chip encoder for HDTV applications," in Proc. IEEE Int. Solid-State Circuits Conf., 2005, pp. 128-588.
-
(2005)
Proc. IEEE Int. Solid-State Circuits Conf
, pp. 128-588
-
-
Huang, Y.-W.1
Chen, T.-C.2
Tsai, C.-H.3
Chen, C.-Y.4
Chen, T.-W.5
Chen, C.-S.6
Shen, C.-F.7
Ma, S.-Y.8
Wang, T.C.9
Hsieh, B.-Y.10
Fang, H.-C.11
Chen, L.-G.12
-
13
-
-
33749266011
-
System analysis of VLSI architecture for motion-compensated temporal filtering
-
C.-Y. Chen, C.-T. Huang, Y.-H. Chen, C.-J. Lian, and L.-G. Chen, "System analysis of VLSI architecture for motion-compensated temporal filtering," in Proc. IEEE Int. Conf. Image Process., 2005, pp. 992-995.
-
(2005)
Proc. IEEE Int. Conf. Image Process
, pp. 992-995
-
-
Chen, C.-Y.1
Huang, C.-T.2
Chen, Y.-H.3
Lian, C.-J.4
Chen, L.-G.5
-
14
-
-
34547250849
-
Frame-level data reuse for motion-compensated temporal filtering
-
C.-Y. Chen, Y.-H. Chen, C.-C. Cheng, and L.-G. Chen, "Frame-level data reuse for motion-compensated temporal filtering," in Proc. IEEE Int. Symp. Circuits Syst., 2006, pp. 5571-5574.
-
(2006)
Proc. IEEE Int. Symp. Circuits Syst
, pp. 5571-5574
-
-
Chen, C.-Y.1
Chen, Y.-H.2
Cheng, C.-C.3
Chen, L.-G.4
-
15
-
-
4344715021
-
Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture
-
T.-C. Chen, Y.-W. Huang, and L.-G. Chen, "Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture," in Proc. IEEE Int. Symp. Circuits Syst., 2004, pp. 273-276.
-
(2004)
Proc. IEEE Int. Symp. Circuits Syst
, pp. 273-276
-
-
Chen, T.-C.1
Huang, Y.-W.2
Chen, L.-G.3
-
16
-
-
64149119169
-
-
Joint Scalable Video Model 2.0, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. N7084, ISO/IEC JTC1, Apr. 2005.
-
Joint Scalable Video Model 2.0, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. N7084, ISO/IEC JTC1, Apr. 2005.
-
-
-
-
17
-
-
67649092274
-
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos
-
T.-W. Chen, Y.-W. Huang, T.-C. Chen, Y.-H. Chen, C.-Y. Tsai, and L.-G. Chen, "Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos," in Proc. IEEE Int. Symp. Circuits Syst., 2005, pp. 2931-2934.
-
(2005)
Proc. IEEE Int. Symp. Circuits Syst
, pp. 2931-2934
-
-
Chen, T.-W.1
Huang, Y.-W.2
Chen, T.-C.3
Chen, Y.-H.4
Tsai, C.-Y.5
Chen, L.-G.6
-
18
-
-
0035509949
-
High-performance and low-power memory-interface architecture for video processing applications
-
Nov
-
H. Kim and I.-C. Park, "High-performance and low-power memory-interface architecture for video processing applications," IEEE Trans. Circuits Syst. Video Technol., vol. 11, no. 11, pp. 1160-1170, Nov. 2001.
-
(2001)
IEEE Trans. Circuits Syst. Video Technol
, vol.11
, Issue.11
, pp. 1160-1170
-
-
Kim, H.1
Park, I.-C.2
-
19
-
-
0035435834
-
An efficient memory arbitration algorithm for a single chip MPEG2 AV decoder
-
Aug
-
T. Takizawa and M. Hirasawa, "An efficient memory arbitration algorithm for a single chip MPEG2 AV decoder," IEEE Trans. Consum. Electron., vol. 47, no. 3, pp. 660-665, Aug. 2001.
-
(2001)
IEEE Trans. Consum. Electron
, vol.47
, Issue.3
, pp. 660-665
-
-
Takizawa, T.1
Hirasawa, M.2
-
20
-
-
64149121002
-
-
CE01: Reduced Memory MCTF, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6 Doc. JVT-P037, Joint Video Team of ISO/IEC MPEG and ITU-T VCEG, Jul. 2005.
-
CE01: Reduced Memory MCTF, ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6 Doc. JVT-P037, Joint Video Team of ISO/IEC MPEG and ITU-T VCEG, Jul. 2005.
-
-
-
-
21
-
-
33846225795
-
A 125 uW, fully scalable MPEG-2 and H.264/AVC video decoder for mobile applications
-
T.-M. Liu, T.-A. Lin, S.-Z. Wang, W.-P. Lee, K.-C. Hou, J.-Y. Yang, and C.-Y. Lee, "A 125 uW, fully scalable MPEG-2 and H.264/AVC video decoder for mobile applications," in Proc. IEEE Int. Solid-State Circuits Conf., 2006, pp. 1576-1585.
-
(2006)
Proc. IEEE Int. Solid-State Circuits Conf
, pp. 1576-1585
-
-
Liu, T.-M.1
Lin, T.-A.2
Wang, S.-Z.3
Lee, W.-P.4
Hou, K.-C.5
Yang, J.-Y.6
Lee, C.-Y.7
-
22
-
-
33646426630
-
Level C+ data reuse scheme for motion estimation with corresponding coding orders
-
Apr
-
C.-Y. Chen, C.-T. Huang, Y.-H. Chen, and L.-G. Chen, "Level C+ data reuse scheme for motion estimation with corresponding coding orders," IEEE Trans. Circuits Syst. Video Technol., vol. 16, no. 4, pp. 553-558, Apr. 2006.
-
(2006)
IEEE Trans. Circuits Syst. Video Technol
, vol.16
, Issue.4
, pp. 553-558
-
-
Chen, C.-Y.1
Huang, C.-T.2
Chen, Y.-H.3
Chen, L.-G.4
-
23
-
-
4544278700
-
Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC
-
May
-
T.-C. Chen, Y.-W. Huang, and L.-G. Chen, "Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC," in Proc. 2004 IEEE Int. Conf. Acoustics, Speech, Signal Process., May 2004, pp. V-9-V-12.
-
(2004)
Proc. 2004 IEEE Int. Conf. Acoustics, Speech, Signal Process
-
-
Chen, T.-C.1
Huang, Y.-W.2
Chen, L.-G.3
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