A 60MHz 240mW MPEG-4 video-phone LSI with 16Mb embedded DRAM

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 230-231

  Nishikawa, T ^a   Takahashi, M ^a   Hamada, M ^a   Takayanagi, T ^a   Arakida, H ^a   Machida, N ^a   Yamamoto, H ^a   Fujiyoshi, T ^a   Matsumoto, Y ^a   Yamagishi, O ^a   Samata, T ^a   Asano, A ^a   Terazawa, T ^a   Ohmori, K ^a   Shirakura, J ^a   Watanabe, Y ^a   Nakamura, H ^a   Minami, S ^a   Kuroda, T ^a   Furuyama, T ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DYNAMIC RANDOM ACCESS STORAGE; EMBEDDED SYSTEMS; FLIP FLOP CIRCUITS; LEAKAGE CURRENTS; LOGIC GATES; MULTIPLEXING; THRESHOLD VOLTAGE; VIDEO SIGNAL PROCESSING; VIDEO TELEPHONE EQUIPMENT;

DIRECT MEMORY ACCESS (DMA) CONTROLLERS;

LSI CIRCUITS;

EID: 0034428239     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. 2, 2-D discrete cosine transform core processor with variable-threshold-voltage scheme
2. A 60mW MPEG-4 video codec using clustered voltage scaling with variable supply-voltage scheme