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Volumn 3, Issue , 2005, Pages 992-995

System analysis of VLSI architecture for motion-compensated temporal filtering

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; DATA STORAGE EQUIPMENT; MOTION COMPENSATION; OPTICAL FILTERS; SYSTEMS ANALYSIS; VLSI CIRCUITS;

EID: 33749266011     PISSN: 15224880     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICIP.2005.1530561     Document Type: Conference Paper
Times cited : (6)

References (7)
  • 3
    • 32544437722 scopus 로고    scopus 로고
    • ISO/IEC JTC1, ISO/IEC JTC1/WG11 Doc. N6716, Oct.
    • ISO/IEC JTC1, "Scalable Video Model 3.0," ISO/IEC JTC1/WG11 Doc. N6716, Oct. 2004.
    • (2004) Scalable Video Model 3.0
  • 5
    • 33646424425 scopus 로고    scopus 로고
    • Memory analysis of VLSI architecture for 5/3 and 1/3 motioncompensated temporal filtering
    • C.-T. Huang, C.-Y. Chen, Y.-H. Chen, and L.-G. Chen, "Memory analysis of VLSI architecture for 5/3 and 1/3 motioncompensated temporal filtering," in Proc. ICASSP, 2005.
    • (2005) Proc. ICASSP
    • Huang, C.-T.1    Chen, C.-Y.2    Chen, Y.-H.3    Chen, L.-G.4
  • 7
    • 0036216763 scopus 로고    scopus 로고
    • On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture
    • Jan.
    • J.-C. Tuan, T.-S. Chang, and C.-W. Jen, "On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture," IEEE Trans. CSVT, vol. 12, no. 1, pp. 61-72, Jan. 2002.
    • (2002) IEEE Trans. CSVT , vol.12 , Issue.1 , pp. 61-72
    • Tuan, J.-C.1    Chang, T.-S.2    Jen, C.-W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.