Frequency and voltage planning for Multi-core processors under thermal constraints

26th IEEE International Conference on Computer Design 2008, ICCD

Volumn , Issue , 2008, Pages 463-470

  Kadin, Michael ^a   Reda, Sherief ^a  

^a Brown University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS;

MAXIMUM TEMPERATURE; MULTI-CORE PROCESSOR; MULTICORE ARCHITECTURES; OPERATING PARAMETERS; OPTIMAL OPERATING CONDITIONS; PHYSICAL PERFORMANCE; PROCESSOR PERFORMANCE; THERMAL CONSTRAINTS;

COMPUTER ARCHITECTURE;

EID: 62349123817     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2008.4751902     Document Type: Conference Paper

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