-
1
-
-
0013353891
-
Splash 2: FPGAs in a Custom Computing Machine
-
D. A. Buell, J. M. Arnold, and W. J. Kleinfelder, Eds
-
D. A. Buell, J. M. Arnold, and W. J. Kleinfelder, Eds., Splash 2: FPGAs in a Custom Computing Machine. IEEE Computer Society Press, 1996.
-
(1996)
IEEE Computer Society Press
-
-
-
3
-
-
34548246070
-
Is high-performance, reconfigurable computing the next supercomputing paradigm?
-
Tampa, Florida, Nov
-
T. El-Ghazawi, "Is high-performance, reconfigurable computing the next supercomputing paradigm?" in Proceedings of the ACM/IEEE SC'06 Conference, Tampa, Florida, Nov 2006.
-
(2006)
Proceedings of the ACM/IEEE SC'06 Conference
-
-
El-Ghazawi, T.1
-
4
-
-
34548271534
-
Architectures and APIs: Assessing requirements for delivering FPGA performance to applications
-
Tampa, Florida, Nov
-
K. D. Underwood, K. S. Hemmert, and C. Ulmer, "Architectures and APIs: Assessing requirements for delivering FPGA performance to applications," in Proceedings of the ACM/IEEE SC'06 Conference, Tampa, Florida, Nov 2006.
-
(2006)
Proceedings of the ACM/IEEE SC'06 Conference
-
-
Underwood, K.D.1
Hemmert, K.S.2
Ulmer, C.3
-
5
-
-
0034848112
-
Route packets, not wires: On-chip interconnection networks
-
W. J. Dally and B. Towles, "Route packets, not wires: On-chip interconnection networks," in Design Automation Conference, 2001. Proceedings, 2001, pp. 684-689.
-
(2001)
Design Automation Conference, 2001. Proceedings
, pp. 684-689
-
-
Dally, W.J.1
Towles, B.2
-
6
-
-
34547491372
-
Packet switched vs. time multiplexed FPGA overlay networks
-
N. Kapre, N. Mehta, M. deLorimier, R. Rubin, H. Barnor, M. J. Wilson, M. Wrighton, and A. DeHon, "Packet switched vs. time multiplexed FPGA overlay networks," in IEEE Symposium on Field-Programmable Custom Computing Machines, 2006.
-
(2006)
IEEE Symposium on Field-Programmable Custom Computing Machines
-
-
Kapre, N.1
Mehta, N.2
deLorimier, M.3
Rubin, R.4
Barnor, H.5
Wilson, M.J.6
Wrighton, M.7
DeHon, A.8
-
7
-
-
46249096381
-
-
T. S. T. Mak, P. Sedcole, P. Y. K. Cheung, and W. Luk, On-FPGA communication architectures and design factors, in In Proc. of the Int. Conference on Field-Programmable Logic and its Applications (FPL 2006), August 2006.
-
T. S. T. Mak, P. Sedcole, P. Y. K. Cheung, and W. Luk, "On-FPGA communication architectures and design factors," in In Proc. of the Int. Conference on Field-Programmable Logic and its Applications (FPL 2006), August 2006.
-
-
-
-
8
-
-
34548740690
-
-
T. Pionteck, C. Albrecht, R. Koch, E. Maehle, M. Hübner, and J. Becker, Communication architectures for dynamically reconfigurable FPGA designs, in In Proceedings of the 21st IEEE International Parallel and Distributed Processing Symposium (IPDPS'07), March 2007.
-
T. Pionteck, C. Albrecht, R. Koch, E. Maehle, M. Hübner, and J. Becker, "Communication architectures for dynamically reconfigurable FPGA designs," in In Proceedings of the 21st IEEE International Parallel and Distributed Processing Symposium (IPDPS'07), March 2007.
-
-
-
-
11
-
-
0026867086
-
Active messages: A mechanism for integrated communication and computation
-
May 19-21
-
T. von Eicken, D. E. Culler, S. C. Goldstein, and K. E. Schauser, "Active messages: A mechanism for integrated communication and computation," in Computer Architecture, 1992. Proceedings., The 19th Annual International Symposium on, May 19-21, 1992, pp. 256-266.
-
(1992)
Computer Architecture, 1992. Proceedings., The 19th Annual International Symposium on
, pp. 256-266
-
-
von Eicken, T.1
Culler, D.E.2
Goldstein, S.C.3
Schauser, K.E.4
-
13
-
-
0036384128
-
Data reorganization engines for the next generation of system-on-a-chip FPGAs
-
Monterey, California, USA, February 24-26
-
P. C. Diniz and J. Park, "Data reorganization engines for the next generation of system-on-a-chip FPGAs," in Proceedings of the 10th International Symposium on Field Programmable Gate Arrays, Monterey, California, USA, February 24-26 2002.
-
(2002)
Proceedings of the 10th International Symposium on Field Programmable Gate Arrays
-
-
Diniz, P.C.1
Park, J.2
-
14
-
-
62349113797
-
Simplify FPGA application design with DIMEtalk
-
Winter
-
C. Sanderson, "Simplify FPGA application design with DIMEtalk," Xcell Journal, vol. Winter, no. 51, pp. 104-107, 2004.
-
(2004)
Xcell Journal, vol
, Issue.51
, pp. 104-107
-
-
Sanderson, C.1
-
15
-
-
62649145414
-
-
EDK Concepts, Xilinx, Inc
-
EDK Concepts, Tools, and Techniques, Xilinx, Inc., 2007.
-
(2007)
Tools, and Techniques
-
-
-
16
-
-
84870669626
-
-
PCI-SIG, "PCI Express," http://www.pcisig.com/.
-
PCI Express
-
-
-
19
-
-
0032680472
-
Media processing with field-programmable gate arrays on a microprocessor's local bus
-
January
-
V. M. Bove, M. Lee, Y.-M. Liu, C. McEniry, T. Nwodoh, and J. Watlington, "Media processing with field-programmable gate arrays on a microprocessor's local bus," in Proceedings of SPIE Media Processors, vol. 3655, January 1999, pp. 14-20.
-
(1999)
Proceedings of SPIE Media Processors
, vol.3655
, pp. 14-20
-
-
Bove, V.M.1
Lee, M.2
Liu, Y.-M.3
McEniry, C.4
Nwodoh, T.5
Watlington, J.6
|