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Volumn 97, Issue 1, 2009, Pages 31-42

3-D stacked package technology and trends

Author keywords

Package in package; Package on package; Semiconductor device packaging; Three dimensional packaging

Indexed keywords

BALL GRID ARRAYS; CHIP SCALE PACKAGES; PACKAGING; SEMICONDUCTOR DEVICES; SOLDERED JOINTS;

EID: 61549125628     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2008.2007460     Document Type: Article
Times cited : (38)

References (14)
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  • 2
    • 61549093892 scopus 로고    scopus 로고
    • Package-on-Package (PoP) and Internal Stacked Module (ISM). (Top Package 12 × 22 mm, .65 mm Ball Pitch, ×16F/N Admux, ×16 DRAM Option BA and ×16NAND, ×16 F/D DDR Option BB Multibus.), JESD21-C, MPC3-12-02, JEDEC, Nov. 2007.
    • Package-on-Package (PoP) and Internal Stacked Module (ISM). (Top Package 12 × 22 mm, .65 mm Ball Pitch, ×16F/N Admux, ×16 DRAM Option BA and ×16NAND, ×16 F/D DDR Option BB Multibus.), JESD21-C, MPC3-12-02, JEDEC, Nov. 2007.
  • 3
    • 61549089500 scopus 로고    scopus 로고
    • Fine-Pitch, Square Ball Grid Array (FBGA) Pacfeage-on-Package (PoP), JEDEC Pub. 95, Design Guide 4.22, JEDEC, Nov. 2007, Issue B.
    • Fine-Pitch, Square Ball Grid Array (FBGA) Pacfeage-on-Package (PoP), JEDEC Pub. 95, Design Guide 4.22, JEDEC, Nov. 2007, Issue B.
  • 4
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    • Standard - Internal Stacking Module, Land Grid Array Packages With External Interconnect Terminals (ISM). Item 11.2-699(S), JEDEC Pub. 95, Design Guide 4.21, JEDEC, Mar. 2007.3
    • Standard - Internal Stacking Module, Land Grid Array Packages With External Interconnect Terminals (ISM). Item 11.2-699(S), JEDEC Pub. 95, Design Guide 4.21, JEDEC, Mar. 2007.3
  • 5
    • 35348856825 scopus 로고    scopus 로고
    • PoP (package-on-package) stacked yield loss study
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    • K. Ishibashi, "PoP (package-on-package) stacked yield loss study," in Proc 57th IEEE ECTC, Reno, NV, May 2007, pp. 1403-1408.
    • (2007) Proc 57th IEEE ECTC , pp. 1403-1408
    • Ishibashi, K.1
  • 6
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    • Moisture/reflow sensitivity classification for nonhermetic solid state surface mounted devices
    • IPC/JEDEC, J-STD-020D, Jun
    • IPC/JEDEC, "Moisture/reflow sensitivity classification for nonhermetic solid state surface mounted devices," J-STD-020D, Jun. 2007.
    • (2007)
  • 7
    • 61549134363 scopus 로고    scopus 로고
    • Board level drop test method of components for handheld electronic products
    • JEDEC, Jul
    • JEDEC, "Board level drop test method of components for handheld electronic products," JESD22-B111, Jul. 2003.
    • (2003) JESD22-B111
  • 9
    • 51349161848 scopus 로고    scopus 로고
    • Package on package warpage-Impact on surface mount yields and board level reliability
    • N. Vijayaragavan, F. Carson, and A. Mistri, "Package on package warpage-Impact on surface mount yields and board level reliability," in Proc. 58th IEEE ECTC.
    • Proc. 58th IEEE ECTC
    • Vijayaragavan, N.1    Carson, F.2    Mistri, A.3
  • 10
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    • High temperature package warpage measurement methodology
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    • JEDEC, "High temperature package warpage measurement methodology," JESD22-B112, May 2005.
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    • Design feature: Packaging stacked memory, Electron
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    • D. Sempek, "Design feature: Packaging stacked memory," Electron. Design News, Feb. 3, 2005.
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    • The development of the fan-in package-on-package
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    • F. Carson, "The development of the fan-in package-on-package," in Proc. 58th IEEE ECTC, submitted for publication.
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    • Flip chip package-in-package (fcPiP): A new 3D packaging solution for mobile platforms
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    • R. Pendse et al., "Flip chip package-in-package (fcPiP): A new 3D packaging solution for mobile platforms," in Proc 57th IEEE ECTC, Reno, NV, May 2007, pp. 1425-1430.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.