Sintered nanosilver paste for high-temperature power semiconductor device attachment

International Journal of Materials and Product Technology

Volumn 34, Issue 1-2, 2009, Pages 95-110

  Calata, Jesus N ^a,b   Lei, Thomas G ^a,b   Lu, Guo Quan ^b  

^a Virginia Polytechnic Institute and State University   (United States)

^b VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

Author keywords

High temperature die attach; Lead free material; Low temperature sintering; Nanoscale silver paste; Packaging; Power electronics modules; Silicon carbide die attach; Sintered joint

Indexed keywords

CHIP SCALE PACKAGES; DIES; HIGH TEMPERATURE APPLICATIONS; PACKAGING; POWER SEMICONDUCTOR DEVICES; PROCESSING; SILICON CARBIDE; SILVER; SINTERED CARBIDES; SINTERING; TEMPERATURE; WIDE BAND GAP SEMICONDUCTORS;

HIGH-TEMPERATURE DIE-ATTACH; LEAD-FREE MATERIAL; LOW-TEMPERATURE SINTERING; NANOSCALE SILVER PASTE; POWER ELECTRONICS MODULES; SILICON CARBIDE DIE-ATTACH; SINTERED JOINT;

LEAD-FREE SOLDERS;

EID: 58149299812     PISSN: 02681900     EISSN: None     Source Type: Journal    
DOI: 10.1504/ijmpt.2009.022406     Document Type: Article

References (27)

1. Bai, J.G. (2005) 'Low-temperature sintering of nanoscale silver paste for semiconductor device interconnection', PhD Dissertation, Department of Materials Science and Engineering, Virginia Polytechnic Institute and State University Blacksburg, Virginia.
2. Bindra, A. (1999) 'BGA MOSFETs keep their cool at high power levels', Electronic Design, Vol. 47, pp.43-46.
3. Bowers, J.S., Hopkins, D.C and Sargeant, W.J. (1997) 'Packaging issues for next generation high voltage, high temperature power electronic modules', 12th Annual Applied Power Electronics Conference and Exposition, IEEE, Vol. 1, pp.413-418.
4. Casady, J.B. and Johnson, R.W. (1996) 'Status of silicon carbide (SiC) as a wide-bandgap semiconductor for high-temperature applications: a review', Solid-State Electronics, Vol. 39, pp. 1409-1422.
5. Choe, J., Calata, J.N. and Lu, G-Q. (1995) 'Constrained-film sintering of a gold circuit paste', Journal of Materials Research, Vol. 10, pp.986-994.
6. Coble, R.L. (1961) 'Sintering of crystalline solids. I. Intermediate and final state diffusion models', Journal of Applied Physics, Vol. 32, pp.787-792.
7. Coble, R.L. (1967) 'Mechanisms of densification during hot pressing', in G.C. Kuczynski, N.A. Hooten and C.F. Gibson (Eds). Sintering and Related Phenomena, New York: Gordon and Breach.
8. Erskine, J.C., Carter, R.G., Hearn, J.A., Fields, H.L. and Himelick, J.M. (1994) 'High temperature automotive electronics: trends and challenges', 2nd International High Temperature Electronics Conference, Charlotte, NC: IEEE, Vol. 1, pp.I-9-I-17.
9. Ferreira, J.A., Hofsajer, I.W. and Van Wyk, J.D. (1997) 'Exploiting the third dimension in power electronics packaging', 12th Annual Applied Power Electronics Conference and Exposition (APEC '97), IEEE, Vol. 1, pp.419-423.
10. Hansen, J.D., Rusin, R.P., Teng, M.H. and Johnson, D.L. (1992) 'Combined-stage sintering model', Journal of the American Ceramic Society, Vol. 75, pp.1129-1135.
11. Herring, C. (1950) 'Effect of change of scale on sintering phenomena', Journal of Applied Physics, Vol. 21, pp.301-303.
12. Ho, C.Y., Powell, R.W. and Liley, P.E. (1972) 'Thermal conductivity of the elements', Journal of Physical and Chemical Reference Data, Vol. 1, pp.279-421.
13. Hopkins, D.C., O Mathuna, S.C., Alderman, A.N. and Flannery, J. (1998) 'A framework for developing power electronics packaging', 13th Applied Power Electronics Conference and Exposition (APEC '98), Anaheim, CA, IEEE, Vol. 1, pp.9-15.
14. Johnson, E.A., Chen, W.T. and Lim, C.K. (1989), in Seraphim, in D.P., Lasky, R. and Li, C-Y. (Eds). Principles of Electronic Packaging, New York: McGraw-Hill.
15. Levin, V.A., Lokhin, V.V. and Zingerman, K.M. (2000) 'Effective elastic properties of porous materials with randomly dispersed pores: finite deformation', Journal of Materials Research, Vol. 67, pp.667-670.
16. Liu, X. and Lu, G-Q. (2000) 'Power chip interconnection: from wire bonding to area bonding', 33rd International Symposium on Microelectronics (IMAPS 2000)', Boston, MA: IMAPS, pp.264-269.
17. Mannion, P. (1999) 'MOSFETs break out of the shackles of wirebonding', Electronic Design, Vol. 47, p.36.
18. Marshall, A. (1992) 'Operating power ICs at 200°C, 23rd Annual IEEE Power Electronics Specialists Conference, Toledo, Spain: IEEE, Vol. 2, pp. 1033-1039.
19. Matula, R.A. (1979) 'Electrical resistivity of copper, gold, palladium and silver', Journal of Physical and Chemical Reference Data, Vol. 8, pp. 1147-1298.
20. Mayo, M.J. (1996) 'Processing of nanocrystalline ceramics from ultrafine particles', International Materials Reviews, Vol. 41, pp.85-115.
21. Parker, W.J., Jenkins, R.J., Butler, C.P. and Abbott, G.L. (1961) 'Flash method of determining thermal diffusivity, heat capacity, and thermal conductivity', Journal of Applied Physics, Vol. 32, pp. 1679-1684.
22. Raj, R. (1987) 'Analysis of the sintering pressure', Journal of the American Ceramic Society, Vol. 70, pp.C-210-C-211.
23. Schwarzbauer, H. (1989) Method of Securing Electronic Components to a Substrate, Siemens Aktiengesellschaft Berlin and Munich, DE, US Patent No. 4,810,672.
24. Schwarzbauer, H. and Kuhnert, R. (1991) 'Novel large area joining technique for improved power device performance', IEEE Transactions on Industry Applications, Vol. 27, pp.93-95.
25. Thaler, B. (2006) 'High temperature packaging of power devices', EMPFasis, July.
26. Zhang, Z. and Lu, G-Q. (2002) 'Pressure-assisted low-temperature sintering of silver paste as an alternative die-attach solution to solder reflow', IEEE Transactions on Electronics Packaging Manufacturing, Vol. 25, pp.279-283.
27. Zhang, Z., Calata, J.N., Bai, J.G. and Lu, G-Q. (2004) 'Nanoscale silver sintering for high-temperature packaging of semiconductor devices', MPMD FIFTH GLOBAL INNOVATIONS PROCEEDINGS - Surfaces and Interfaces in Nanostructured Materials and Trends in LIGA, Miniaturization, and Nanoscale Materials Devices', Charlotte, NC, TMS, pp.129-135.