-
1
-
-
34547098588
-
A VHDL Holistic Modeling Approach and FPGA Implementation of a Digital Sensorless Induction Motor Control Scheme
-
Aug
-
M. N. Cirstea, and A. Dinu, "A VHDL Holistic Modeling Approach and FPGA Implementation of a Digital Sensorless Induction Motor Control Scheme," IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 1853-1864, Aug. 2007.
-
(2007)
IEEE Trans. Ind. Electron
, vol.54
, Issue.4
, pp. 1853-1864
-
-
Cirstea, M.N.1
Dinu, A.2
-
2
-
-
34547980926
-
Design and implementation of modular FPGA-Based PID controllers
-
Aug
-
Y. Fong Chan, M. Moallein, and W. Wang, "Design and implementation of modular FPGA-Based PID controllers," IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 1898-1906, Aug. 2007.
-
(2007)
IEEE Trans. Ind. Electron
, vol.54
, Issue.4
, pp. 1898-1906
-
-
Fong Chan, Y.1
Moallein, M.2
Wang, W.3
-
3
-
-
33749455625
-
-
S-Su Kim and S. Jung, Hardware Implementation of a Neural Network Controller with an MCU and an FPGA for Nonlinear Systems, in proc. IJCAS, 4, no. 5, pp. 567-574, Oct. 2006.
-
S-Su Kim and S. Jung, "Hardware Implementation of a Neural Network Controller with an MCU and an FPGA for Nonlinear Systems," in proc. IJCAS, vol. 4, no. 5, pp. 567-574, Oct. 2006.
-
-
-
-
5
-
-
51049114071
-
FPGA HardCore single processor implementation of RT control applications
-
Tozeur, Tunisia, Mar
-
S. Ben Othman, A. K. Ben Salem, and S. Ben Saoud, "FPGA HardCore single processor implementation of RT control applications," in Proc. IEEE DTIS, Tozeur, Tunisia, Mar. 2008.
-
(2008)
Proc. IEEE DTIS
-
-
Ben Othman, S.1
Ben Salem, A.K.2
Ben Saoud, S.3
-
6
-
-
51049099888
-
Emulateur temps réel d'associations Convertisseurs statiques / Machines électriques / Capteurs : Etude, conception et réalisation,
-
PHD thesis, ENSEEIHT, INPT, France
-
S. B. Saoud, "Emulateur temps réel d'associations Convertisseurs statiques / Machines électriques / Capteurs : Etude, conception et réalisation," PHD thesis, ENSEEIHT, INPT, France, 1996.
-
(1996)
-
-
Saoud, S.B.1
-
7
-
-
34247256989
-
Multi-processor System Design with ESPAM
-
Seoul, Korea, Oct
-
H. Nikolov, T. Stefanov and E. Deprettere, "Multi-processor System Design with ESPAM," in Proc. ACM CODES+ISSS'06, Seoul, Korea, Oct. 2006, pp. 211-216.
-
(2006)
Proc. ACM CODES+ISSS'06
, pp. 211-216
-
-
Nikolov, H.1
Stefanov, T.2
Deprettere, E.3
-
9
-
-
33751425420
-
Code Restructuring for Improving Cache Performance of MPSoCs
-
G. Chen, and M. Kandemir, "Code Restructuring for Improving Cache Performance of MPSoCs," IEEE, pp. 271-274, 2005.
-
(2005)
IEEE
, pp. 271-274
-
-
Chen, G.1
Kandemir, M.2
-
10
-
-
85165844937
-
-
A. A. Jerraya, A. Bouchhima, F. Petrot, Programming models and HW-SW Interfaces, Abstraction for Multi-Processor SoC, ACM, DAC 2006, pp 280-285, California, USA, 2006.
-
A. A. Jerraya, A. Bouchhima, F. Petrot, "Programming models and HW-SW Interfaces, Abstraction for Multi-Processor SoC," ACM, DAC 2006, pp 280-285, California, USA, 2006.
-
-
-
-
11
-
-
57849091338
-
-
F. Schirrmeister, Multi-core Processors: Fundamentals, Trends, and Challenges, ESC, ESC351, San Francisco, 2007.
-
F. Schirrmeister, "Multi-core Processors: Fundamentals, Trends, and Challenges," ESC, ESC351, San Francisco, 2007.
-
-
-
-
12
-
-
48149093478
-
Multiprocessor System-Level Synthesis for Multiple Applications on Platform FPGA
-
A. Kumar, S. Fernando, Y. Ha, B. Mesman, H. Corporaal, "Multiprocessor System-Level Synthesis for Multiple Applications on Platform FPGA", in proc. FPL, 2007.
-
(2007)
proc. FPL
-
-
Kumar, A.1
Fernando, S.2
Ha, Y.3
Mesman, B.4
Corporaal, H.5
-
13
-
-
33746289952
-
Parallel and flexible multiprocessor system-on-chip for adaptive automotive applications based on Xilinx MicroBlaze soft-cores
-
M. Hübner, K. Paulsson, J. Becker, "Parallel and flexible multiprocessor system-on-chip for adaptive automotive applications based on Xilinx MicroBlaze soft-cores," in Proc. IEEE IPDPS, 2005.
-
(2005)
Proc. IEEE IPDPS
-
-
Hübner, M.1
Paulsson, K.2
Becker, J.3
-
14
-
-
46249121811
-
A complete Multi-processor System-on-Chip FPGA-Based emulation framework
-
P. G. Del Valle, D. Atienza, I. Magan, and others, "A complete Multi-processor System-on-Chip FPGA-Based emulation framework," in Proc. IFIP Conf, 2006, pp. 140-145.
-
(2006)
Proc. IFIP Conf
, pp. 140-145
-
-
Del Valle, P.G.1
Atienza, D.2
Magan, I.3
and others4
-
16
-
-
57849121656
-
Designing Multiprocessor Systems in Platform Studio
-
V. Asokan, "Designing Multiprocessor Systems in Platform Studio," XPS White Pajier, WP262, 2007.
-
(2007)
XPS White Pajier, WP262
-
-
Asokan, V.1
-
18
-
-
34547224724
-
Overview of the MPSoC Design Challenge
-
California, USA
-
Grant Martin, "Overview of the MPSoC Design Challenge," ACM, DAC06, pp 274-279, California, USA, 2006.
-
(2006)
ACM, DAC06
, pp. 274-279
-
-
Martin, G.1
-
19
-
-
57849099291
-
Dual Processor Reference Design Suite
-
Vasanth Asokan, "Dual Processor Reference Design Suite," Xilinx application note, APP996, 2007.
-
(2007)
Xilinx application note
, vol.APP996
-
-
Asokan, V.1
-
20
-
-
33847029396
-
FPGA Embedded Processors
-
San Francisco
-
B. H. Fletcher, "FPGA Embedded Processors," ESC, San Francisco, ETP-367, 2005.
-
(2005)
ESC
, vol.ETP-367
-
-
Fletcher, B.H.1
|