Code restructuring for improving cache performance of MPSoCs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 271-274

  Chen, G ^a   Kandemir, M ^a  

^a The Pennsylvania State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; DATA PROCESSING; DATA REDUCTION; MICROPROCESSOR CHIPS; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; SHAPE MEMORY EFFECT;

DATA BLOCKS; DATA LOCALITY OPTIMIZATION TECHNIQUES; MPSOC ARCHITECTURES; OFF CHIP MEMORY ACCESSES;

CACHE MEMORY;

EID: 33751425420     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560076     Document Type: Conference Paper

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