A complete multi-processor system-on-chip FPGA-based emulation framework

IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip

Volumn , Issue , 2006, Pages 140-145

  Del Valle, Pablo G ^a   Atienza, David ^a,b   Magan, Ivan ^a   Flores, Javier G ^a   Perez, Esther A ^a   Mendias, Jose M ^a   Benini, Luca ^c   De Micheli, Giovanni ^b  

^a UNIVERSIDAD COMPLUTENSE DE MADRID   (Spain)

^b EPFL   (Switzerland)

^c UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CHIP SCALE PACKAGES; CONSUMER PRODUCTS; DATA STORAGE EQUIPMENT; ENERGY POLICY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUITS; LSI CIRCUITS; MACHINE DESIGN; MULTIPROCESSING SYSTEMS; PROGRAMMABLE LOGIC CONTROLLERS; SYSTEMS ANALYSIS; TECHNOLOGY;

(ALGORITHMIC) COMPLEXITY; CONSUMER EMBEDDED PRODUCTS; CRITICAL STATISTICS; CYCLE ACCURATE; DESIGN CONSTRAINTS; ENERGY CONSUMPTION; HARDWARE AND SOFTWARE (SW) DESIGN; IN-PROCESS TECHNOLOGY; INTERCONNECTION SYSTEMS; INTERNATIONAL CONFERENCES; LARGE RANGE; MPSOC DESIGNS; MULTI PROCESSOR SYSTEM ON CHIP (MP SOC); PROCESSING CORES; REAL-TIME APPLICATIONS; SPEED UPS; SYSTEM ON CHIP (SOCS); THREE ORDERS OF MAGNITUDE; TIME-TO-MARKET (TTM); VERY LARGE SCALE INTEGRATION (VLSI); VIDEO PROCESSING; VIDEOGAMES;

REAL TIME SYSTEMS;

EID: 46249121811     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISOC.2006.313218     Document Type: Conference Paper

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